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[src/trunk]: src/sys/dev/pci Add support for SYSTEMBASE SB16C105x 4-port/8-po...
details: https://anonhg.NetBSD.org/src/rev/c98226d59582
branches: trunk
changeset: 765486:c98226d59582
user: ryo <ryo%NetBSD.org@localhost>
date: Sat May 28 10:48:50 2011 +0000
description:
Add support for SYSTEMBASE SB16C105x 4-port/8-port serial PCI cards.
- Added initialize code for SB16C105x to puc.c, but
It is better to add a member (*config_function)() to
struct puc_device_description and use it
- It seems SB16C1054 *rev 0x91* has different BAR layout, but not supported yet.
diffstat:
sys/dev/pci/puc.c | 20 ++++++++++++++++++--
sys/dev/pci/pucdata.c | 32 ++++++++++++++++++++++++++++++--
2 files changed, 48 insertions(+), 4 deletions(-)
diffs (101 lines):
diff -r e6266155d697 -r c98226d59582 sys/dev/pci/puc.c
--- a/sys/dev/pci/puc.c Sat May 28 10:45:08 2011 +0000
+++ b/sys/dev/pci/puc.c Sat May 28 10:48:50 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: puc.c,v 1.31 2008/07/09 14:46:15 joerg Exp $ */
+/* $NetBSD: puc.c,v 1.32 2011/05/28 10:48:50 ryo Exp $ */
/*
* Copyright (c) 1996, 1998, 1999
@@ -53,7 +53,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: puc.c,v 1.31 2008/07/09 14:46:15 joerg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: puc.c,v 1.32 2011/05/28 10:48:50 ryo Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -62,6 +62,7 @@
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pucvar.h>
+#include <dev/pci/pcidevs.h>
#include <sys/termios.h>
#include <dev/ic/comreg.h>
#include <dev/ic/comvar.h>
@@ -245,6 +246,21 @@
* XXX It's not pretty, but hey, what is?
*/
+ /* SB16C10xx board specific initialization */
+ if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYSTEMBASE &&
+ (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SYSTEMBASE_SB16C1054 ||
+ PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SYSTEMBASE_SB16C1058)) {
+ if (!sc->sc_bar_mappings[1].mapped) {
+ aprint_error_dev(self,
+ "optional register is not mapped\n");
+ return;
+ }
+#define SB16C105X_OPT_IMRREG0 0x0000000c
+ /* enable port 0-7 interrupt */
+ bus_space_write_1(sc->sc_bar_mappings[1].t,
+ sc->sc_bar_mappings[1].h, SB16C105X_OPT_IMRREG0, 0xff);
+ }
+
/* Configure each port. */
for (i = 0; PUC_PORT_VALID(sc->sc_desc, i); i++) {
bus_space_handle_t subregion_handle;
diff -r e6266155d697 -r c98226d59582 sys/dev/pci/pucdata.c
--- a/sys/dev/pci/pucdata.c Sat May 28 10:45:08 2011 +0000
+++ b/sys/dev/pci/pucdata.c Sat May 28 10:48:50 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pucdata.c,v 1.74 2011/05/14 22:07:38 martin Exp $ */
+/* $NetBSD: pucdata.c,v 1.75 2011/05/28 10:48:51 ryo Exp $ */
/*
* Copyright (c) 1998, 1999 Christopher G. Demetriou. All rights reserved.
@@ -36,7 +36,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.74 2011/05/14 22:07:38 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pucdata.c,v 1.75 2011/05/28 10:48:51 ryo Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -2109,6 +2109,34 @@
},
},
+ /* SystemBase SB16C1054 UARTs */
+ { "SystemBase SB16C1054",
+ { PCI_VENDOR_SYSTEMBASE, PCI_PRODUCT_SYSTEMBASE_SB16C1054, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ { PUC_PORT_TYPE_COM, 0x10, 0x08, COM_FREQ },
+ { PUC_PORT_TYPE_COM, 0x10, 0x10, COM_FREQ },
+ { PUC_PORT_TYPE_COM, 0x10, 0x18, COM_FREQ },
+ },
+ },
+
+ /* SystemBase SB16C1058 UARTs */
+ { "SystemBase SB16C1058",
+ { PCI_VENDOR_SYSTEMBASE, PCI_PRODUCT_SYSTEMBASE_SB16C1058, 0, 0 },
+ { 0xffff, 0xffff, 0, 0 },
+ {
+ { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ },
+ { PUC_PORT_TYPE_COM, 0x10, 0x08, COM_FREQ },
+ { PUC_PORT_TYPE_COM, 0x10, 0x10, COM_FREQ },
+ { PUC_PORT_TYPE_COM, 0x10, 0x18, COM_FREQ },
+ { PUC_PORT_TYPE_COM, 0x10, 0x20, COM_FREQ },
+ { PUC_PORT_TYPE_COM, 0x10, 0x28, COM_FREQ },
+ { PUC_PORT_TYPE_COM, 0x10, 0x30, COM_FREQ },
+ { PUC_PORT_TYPE_COM, 0x10, 0x38, COM_FREQ },
+ },
+ },
+
/*
* VScom PCI 010L
* one lpt
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