Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch Make powerpc work on BookE. At this time we only s...



details:   https://anonhg.NetBSD.org/src/rev/1febad418f61
branches:  trunk
changeset: 766516:1febad418f61
user:      matt <matt%NetBSD.org@localhost>
date:      Sat Jun 25 00:07:10 2011 +0000

description:
Make powerpc work on BookE.  At this time we only support DOZE (lightest
form of power-saving).  By default, power-saving is disabled but can be
enabled in /etc/sysctl.conf by setting machdep.powersave=1

diffstat:

 sys/arch/evbppc/mpc85xx/machdep.c   |  13 ++++++++++---
 sys/arch/powerpc/booke/e500_intr.c  |  15 +++++++++++++--
 sys/arch/powerpc/booke/e500_timer.c |   6 ++++--
 3 files changed, 27 insertions(+), 7 deletions(-)

diffs (119 lines):

diff -r f5563fbb2a9e -r 1febad418f61 sys/arch/evbppc/mpc85xx/machdep.c
--- a/sys/arch/evbppc/mpc85xx/machdep.c Fri Jun 24 23:54:37 2011 +0000
+++ b/sys/arch/evbppc/mpc85xx/machdep.c Sat Jun 25 00:07:10 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.c,v 1.12 2011/06/23 01:27:20 matt Exp $        */
+/*     $NetBSD: machdep.c,v 1.13 2011/06/25 00:07:10 matt Exp $        */
 /*-
  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -752,7 +752,7 @@
        msr = wrtee(0);
 
        hid0 = mfspr(SPR_HID0);
-       hid0 = (hid0 & ~HID0_TBEN) | HID0_DOZE;
+       hid0 = (hid0 & ~(HID0_TBEN|HID0_NAP|HID0_SLEEP)) | HID0_DOZE;
        mtspr(SPR_HID0, hid0);
 
        msr = (msr & ~(PSL_EE|PSL_CE|PSL_ME)) | PSL_WE;
@@ -778,8 +778,13 @@
        printf(" initppc(%#"PRIxVADDR", %#"PRIxVADDR", %p, %p, %p, %p)<enter>",
            startkernel, endkernel, a0, a1, a2, a3);
 
+       /*
+        * Make sure we don't enter NAP or SLEEP if PSL_POW (MSR[WE]) is set.
+        * DOZE is ok.
+        */
        const register_t hid0 = mfspr(SPR_HID0);
-       mtspr(SPR_HID0, hid0 | HID0_TBEN | HID0_EMCP);
+       mtspr(SPR_HID0,
+           (hid0 & ~(HID0_NAP | HID0_SLEEP)) | HID0_TBEN | HID0_EMCP | HID0_DOZE);
 #ifdef CADMUS
        /*
         * Need to cache this from cadmus since we need to unmap cadmus since
@@ -1064,6 +1069,8 @@
        struct cpu_info * const ci = curcpu();
        const uint16_t svr = getsvr();
 
+       powersave = 0;  /* we can do it but turn it on by default */
+
        booke_cpu_startup(socname(mfspr(SPR_SVR)));
 
        uint32_t v = cpu_read_4(GLOBAL_BASE + PORPLLSR);
diff -r f5563fbb2a9e -r 1febad418f61 sys/arch/powerpc/booke/e500_intr.c
--- a/sys/arch/powerpc/booke/e500_intr.c        Fri Jun 24 23:54:37 2011 +0000
+++ b/sys/arch/powerpc/booke/e500_intr.c        Sat Jun 25 00:07:10 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: e500_intr.c,v 1.12 2011/06/21 06:24:25 matt Exp $      */
+/*     $NetBSD: e500_intr.c,v 1.13 2011/06/25 00:07:10 matt Exp $      */
 /*-
  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -444,6 +444,7 @@
 e500_splset(struct cpu_info *ci, int ipl)
 {
        struct cpu_softc * const cpu = ci->ci_softc;
+
        //KASSERT(!cpu_intr_p() || ipl >= IPL_VM);
        KASSERT((curlwp->l_pflag & LP_INTR) == 0 || ipl != IPL_NONE);
 #if 0
@@ -454,7 +455,7 @@
        u_int ctpr = (ipl >= IPL_VM ? 15 : ipl);
        KASSERT(openpic_read(cpu, OPENPIC_CTPR) == old_ctpr);
 #else
-       u_int ctpr = IPL2CTPR(ipl);
+       const u_int ctpr = IPL2CTPR(ipl);
        KASSERT(openpic_read(cpu, OPENPIC_CTPR) == IPL2CTPR(ci->ci_cpl));
 #endif
        openpic_write(cpu, OPENPIC_CTPR, ctpr);
@@ -951,6 +952,13 @@
        e500_splset(ci, old_ipl);               /* and drop back */
 #endif
 
+       /*
+        * If we interrupted while power-saving and we need to exit idle,
+        * we need to clear PSL_POW so we won't go back into power-saving.
+        */
+       if (__predict_false(tf->tf_srr1 & PSL_POW) && ci->ci_want_resched)
+               tf->tf_srr1 &= ~PSL_POW;
+
 //     printf("%s(%p): idepth=%d exit\n", __func__, tf, ci->ci_idepth);
 }
 
@@ -1047,6 +1055,9 @@
            ("%s: cpu%u: CTPR (%d) != IPL_NONE", __func__, cpu_number(),
             CTPR2IPL(openpic_read(curcpu()->ci_softc, OPENPIC_CTPR))));
        KASSERT(mfmsr() & PSL_EE);
+
+       if (powersave > 0)
+               mtmsr(mfmsr() | PSL_POW);
 }
 
 static void
diff -r f5563fbb2a9e -r 1febad418f61 sys/arch/powerpc/booke/e500_timer.c
--- a/sys/arch/powerpc/booke/e500_timer.c       Fri Jun 24 23:54:37 2011 +0000
+++ b/sys/arch/powerpc/booke/e500_timer.c       Sat Jun 25 00:07:10 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: e500_timer.c,v 1.2 2011/01/18 01:02:52 matt Exp $      */
+/*     $NetBSD: e500_timer.c,v 1.3 2011/06/25 00:07:10 matt Exp $      */
 /*-
  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -35,7 +35,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: e500_timer.c,v 1.2 2011/01/18 01:02:52 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: e500_timer.c,v 1.3 2011/06/25 00:07:10 matt Exp $");
 
 #include <sys/param.h>
 #include <sys/kernel.h>
@@ -153,6 +153,8 @@
 
        wrtee(0);       /* turn off interrupts */
 
+       tf->tf_srr1 &= ~PSL_POW;        /* make cpu_idle exit */
+
        return 1;
 }
 



Home | Main Index | Thread Index | Old Index