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[src/trunk]: src/sys/uvm Move PMAP_* cache defines to before inclusion of <ma...
details: https://anonhg.NetBSD.org/src/rev/7e6b87c9d703
branches: trunk
changeset: 766680:7e6b87c9d703
user: matt <matt%NetBSD.org@localhost>
date: Thu Jun 30 00:49:14 2011 +0000
description:
Move PMAP_* cache defines to before inclusion of <machine/pmap.h>
diffstat:
sys/uvm/uvm_pmap.h | 45 +++++++++++++++++++++++----------------------
1 files changed, 23 insertions(+), 22 deletions(-)
diffs (67 lines):
diff -r 6ae977fadb97 -r 7e6b87c9d703 sys/uvm/uvm_pmap.h
--- a/sys/uvm/uvm_pmap.h Thu Jun 30 00:37:07 2011 +0000
+++ b/sys/uvm/uvm_pmap.h Thu Jun 30 00:49:14 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: uvm_pmap.h,v 1.36 2011/02/11 23:05:55 jmcneill Exp $ */
+/* $NetBSD: uvm_pmap.h,v 1.37 2011/06/30 00:49:14 matt Exp $ */
/*
* Copyright (c) 1991, 1993
@@ -90,8 +90,29 @@
extern struct pmap *const kernel_pmap_ptr;
#define pmap_kernel() kernel_pmap_ptr
+#endif
+
+/*
+ * Cache Type Encodings
+ */
+#define PMAP_CACHE_MASK 0x00000f00
+
+/* All accesses are uncacheable. No speculative accesses. */
+#define PMAP_NOCACHE 0x00000100 /* [BOTH] */
+
+/* All accesses are uncacheable. No speculative accesses.
+ * Writes are combined. */
+#define PMAP_WRITE_COMBINE 0x00000200 /* [BOTH] */
+
+/* On reads, cachelines become shared or exclusive if allocated on cache miss.
+ * On writes, cachelines become modified on a cache miss. */
+#define PMAP_WRITE_BACK 0x00000300 /* [BOTH] */
+
+/* = PMAP_NOCACHE but overrideable (e.g. on x86 by MTRRs) */
+#define PMAP_NOCACHE_OVR 0x00000400 /* [BOTH] */
+
+#ifdef _KERNEL
#include <machine/pmap.h>
-
#endif
/*
@@ -114,26 +135,6 @@
#define PMAP_MD_MASK 0xff000000 /* [BOTH] Machine-dependent bits */
#define PMAP_PROT_MASK 0x0000000f /* [BOTH] VM_PROT_* bit mask */
-/*
- * Cache Type Encodings
- */
-#define PMAP_CACHE_MASK 0x00000f00
-
-/* All accesses are uncacheable. No speculative accesses. */
-#define PMAP_NOCACHE 0x00000100 /* [BOTH] */
-
-/* All accesses are uncacheable. No speculative accesses.
- * Writes are combined. */
-#define PMAP_WRITE_COMBINE 0x00000200 /* [BOTH] */
-
-/* On reads, cachelines become shared or exclusive if allocated on cache miss.
- * On writes, cachelines become modified on a cache miss. */
-#define PMAP_WRITE_BACK 0x00000300 /* [BOTH] */
-
-/* = PMAP_NOCACHE but overrideable (e.g. on x86 by MTRRs) */
-#define PMAP_NOCACHE_OVR 0x00000400 /* [BOTH] */
-
-
#ifndef PMAP_EXCLUDE_DECLS /* Used in Sparc port to virtualize pmap mod */
#ifdef _KERNEL
__BEGIN_DECLS
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