[src/trunk]: src/sys/arch/mips/mips add a hook to mips3_initclocks() to allow...

[macallan <macallan%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c9237b01be00
branches:  trunk
changeset: 772010:c9237b01be00
user:      macallan <macallan%NetBSD.org@localhost>
date:      Tue Dec 13 14:23:43 2011 +0000

description:
add a hook to mips3_initclocks() to allow for time counters other than the
cp0 cycle counter

diffstat:

 sys/arch/mips/mips/mips3_clockintr.c |  25 ++++++++++++++++++++-----
 1 files changed, 20 insertions(+), 5 deletions(-)

diffs (67 lines):

diff -r c3c2d70f87c9 -r c9237b01be00 sys/arch/mips/mips/mips3_clockintr.c
--- a/sys/arch/mips/mips/mips3_clockintr.c      Tue Dec 13 13:32:15 2011 +0000
+++ b/sys/arch/mips/mips/mips3_clockintr.c      Tue Dec 13 14:23:43 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mips3_clockintr.c,v 1.12 2011/07/10 23:13:22 matt Exp $        */
+/*     $NetBSD: mips3_clockintr.c,v 1.13 2011/12/13 14:23:43 macallan Exp $    */
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -39,7 +39,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mips3_clockintr.c,v 1.12 2011/07/10 23:13:22 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips3_clockintr.c,v 1.13 2011/12/13 14:23:43 macallan Exp $");
 
 #include <sys/param.h>
 #include <sys/cpu.h>
@@ -57,6 +57,11 @@
  * responsible for blocking and renabling the interrupt in the
  * cpu_intr() routine.
  */
+
+static void mips3_init_cp0_clocks(void);
+void (*initclocks_ptr)(void) = mips3_init_cp0_clocks;
+
+
 void
 mips3_clockintr(struct clockframe *cfp)
 {
@@ -88,7 +93,6 @@
         */
 
        hardclock(cfp);
-
        /* caller should renable clock interrupts */
 }
 
@@ -96,8 +100,8 @@
  * Start the real-time and statistics clocks. Leave stathz 0 since there
  * are no other timers available.
  */
-void
-mips3_initclocks(void)
+static void
+mips3_init_cp0_clocks(void)
 {
        struct cpu_info * const ci = curcpu();
 
@@ -106,6 +110,17 @@
 
        mips3_init_tc();
 
+}
+
+void
+mips3_initclocks(void)
+{
+       if (initclocks_ptr != NULL) {
+               initclocks_ptr();
+       } else {
+               mips3_init_cp0_clocks();
+       }
+
        /*
         * Now we can enable all interrupts including hardclock(9)
         * by CPU INT5.