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[src/netbsd-6]: src/sys/dev/sbus Pull up following revision(s) (requested by ...
details: https://anonhg.NetBSD.org/src/rev/2be13953a139
branches: netbsd-6
changeset: 774291:2be13953a139
user: riz <riz%NetBSD.org@localhost>
date: Wed Jul 04 19:38:54 2012 +0000
description:
Pull up following revision(s) (requested by jdc in ticket #367):
sys/dev/sbus/qe.c: revision 1.61
sys/dev/sbus/qe.c: revision 1.62
Fix fallout from revision 1.46, and call ether_ioctl() in the default path.
Patch from John D. Baker in PR port-sparc/46572.
Fix multicast filter set up: we need to byte-swap the hash before writing to
the chip. While here, remove open-coded copy of ether_crc32_le().
diffstat:
sys/dev/sbus/qe.c | 31 +++++++++++--------------------
1 files changed, 11 insertions(+), 20 deletions(-)
diffs (71 lines):
diff -r c920f9e567f6 -r 2be13953a139 sys/dev/sbus/qe.c
--- a/sys/dev/sbus/qe.c Tue Jul 03 21:27:54 2012 +0000
+++ b/sys/dev/sbus/qe.c Wed Jul 04 19:38:54 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: qe.c,v 1.60 2012/02/02 19:43:06 tls Exp $ */
+/* $NetBSD: qe.c,v 1.60.2.1 2012/07/04 19:38:54 riz Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@@ -66,7 +66,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: qe.c,v 1.60 2012/02/02 19:43:06 tls Exp $");
+__KERNEL_RCSID(0, "$NetBSD: qe.c,v 1.60.2.1 2012/07/04 19:38:54 riz Exp $");
#define QEDEBUG
@@ -956,7 +956,7 @@
break;
default:
- error = EINVAL;
+ error = ether_ioctl(ifp, cmd, data);
break;
}
@@ -1077,7 +1077,7 @@
uint32_t crc;
uint16_t hash[4];
uint8_t octet, maccc, *ladrp = (uint8_t *)&hash[0];
- int i, j;
+ int i;
#if defined(SUN4U) || defined(__GNUC__)
(void)&t;
@@ -1125,27 +1125,18 @@
break;
}
- crc = 0xffffffff;
-
- for (i = 0; i < ETHER_ADDR_LEN; i++) {
- octet = enm->enm_addrlo[i];
-
- for (j = 0; j < 8; j++) {
- if ((crc & 1) ^ (octet & 1)) {
- crc >>= 1;
- crc ^= MC_POLY_LE;
- }
- else
- crc >>= 1;
- octet >>= 1;
- }
- }
-
+ crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN);
crc >>= 26;
hash[crc >> 4] |= 1 << (crc & 0xf);
ETHER_NEXT_MULTI(step, enm);
}
+ /* We need to byte-swap the hash before writing to the chip. */
+ for (i = 0; i < 7; i += 2) {
+ octet = ladrp[i];
+ ladrp[i] = ladrp[i + 1];
+ ladrp[i + 1] = octet;
+ }
bus_space_write_1(t, mr, QE_MRI_IAC,
QE_MR_IAC_ADDRCHG | QE_MR_IAC_LOGADDR);
bus_space_write_multi_1(t, mr, QE_MRI_LADRF, ladrp, 8);
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