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[src/trunk]: src loongson2f support:
details: https://anonhg.NetBSD.org/src/rev/ffeaa67c0bee
branches: trunk
changeset: 768775:ffeaa67c0bee
user: bouyer <bouyer%NetBSD.org@localhost>
date: Sat Aug 27 13:23:52 2011 +0000
description:
loongson2f support:
- Add some loongson2 definitions to cpuregs.h, from OpenBSD
- Make sure that the at register is useable before every jump register
instruction (exept when register is k0 or k1) because -mfix-loongson2f-btb
needs the at register for its workaround
- add code to mips_fixup.c to handle the instructions added by
-mfix-loongson2f-btb
- Add a ls2-specific tlb miss handler: it doesn't have separate handler
for the xtlbmiss exeption.
- Fixes for some #ifdef MIPS3_LOONGSON2 assembly code (using the wrong
register)
diffstat:
common/lib/libc/arch/mips/atomic/atomic_add.S | 15 ++-
common/lib/libc/arch/mips/atomic/atomic_and.S | 15 ++-
common/lib/libc/arch/mips/atomic/atomic_dec.S | 14 ++-
common/lib/libc/arch/mips/atomic/atomic_inc.S | 15 ++-
common/lib/libc/arch/mips/atomic/atomic_or.S | 12 ++-
common/lib/libc/arch/mips/atomic/atomic_swap.S | 15 ++-
common/lib/libc/arch/mips/string/bcopy.S | 8 +-
sys/arch/mips/include/cpuregs.h | 59 ++++++++++++-
sys/arch/mips/mips/lock_stubs_ras.S | 37 ++++++-
sys/arch/mips/mips/mipsX_subr.S | 120 ++++++++++++++++++------
sys/arch/mips/mips/mips_fixup.c | 32 +++++-
11 files changed, 280 insertions(+), 62 deletions(-)
diffs (truncated from 765 to 300 lines):
diff -r a018bb407673 -r ffeaa67c0bee common/lib/libc/arch/mips/atomic/atomic_add.S
--- a/common/lib/libc/arch/mips/atomic/atomic_add.S Sat Aug 27 13:19:39 2011 +0000
+++ b/common/lib/libc/arch/mips/atomic/atomic_add.S Sat Aug 27 13:23:52 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic_add.S,v 1.2 2009/12/14 00:38:59 matt Exp $ */
+/* $NetBSD: atomic_add.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -30,12 +30,21 @@
#include <machine/asm.h>
#include "atomic_op_asm.h"
-RCSID("$NetBSD: atomic_add.S,v 1.2 2009/12/14 00:38:59 matt Exp $")
+RCSID("$NetBSD: atomic_add.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $")
.text
+ .set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
.set noat
- .set noreorder
.set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
+ .set nomacro
+#endif /* _KERNEL_OPT */
+
LEAF(_atomic_add_32)
1: INT_LL t0, 0(a0)
diff -r a018bb407673 -r ffeaa67c0bee common/lib/libc/arch/mips/atomic/atomic_and.S
--- a/common/lib/libc/arch/mips/atomic/atomic_and.S Sat Aug 27 13:19:39 2011 +0000
+++ b/common/lib/libc/arch/mips/atomic/atomic_and.S Sat Aug 27 13:23:52 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic_and.S,v 1.2 2009/12/14 00:38:59 matt Exp $ */
+/* $NetBSD: atomic_and.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -30,12 +30,21 @@
#include <machine/asm.h>
#include "atomic_op_asm.h"
-RCSID("$NetBSD: atomic_and.S,v 1.2 2009/12/14 00:38:59 matt Exp $")
+RCSID("$NetBSD: atomic_and.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $")
.text
+ .set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
.set noat
- .set noreorder
.set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
+ .set nomacro
+#endif /* _KERNEL_OPT */
+
LEAF(_atomic_and_32)
1: INT_LL t0, 0(a0)
diff -r a018bb407673 -r ffeaa67c0bee common/lib/libc/arch/mips/atomic/atomic_dec.S
--- a/common/lib/libc/arch/mips/atomic/atomic_dec.S Sat Aug 27 13:19:39 2011 +0000
+++ b/common/lib/libc/arch/mips/atomic/atomic_dec.S Sat Aug 27 13:23:52 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic_dec.S,v 1.2 2009/12/14 00:39:00 matt Exp $ */
+/* $NetBSD: atomic_dec.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -30,12 +30,20 @@
#include <machine/asm.h>
#include "atomic_op_asm.h"
-RCSID("$NetBSD: atomic_dec.S,v 1.2 2009/12/14 00:39:00 matt Exp $")
+RCSID("$NetBSD: atomic_dec.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $")
.text
+ .set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
.set noat
- .set noreorder
.set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
+ .set nomacro
+#endif /* _KERNEL_OPT */
LEAF(_atomic_dec_32)
1: INT_LL t0, 0(a0)
diff -r a018bb407673 -r ffeaa67c0bee common/lib/libc/arch/mips/atomic/atomic_inc.S
--- a/common/lib/libc/arch/mips/atomic/atomic_inc.S Sat Aug 27 13:19:39 2011 +0000
+++ b/common/lib/libc/arch/mips/atomic/atomic_inc.S Sat Aug 27 13:23:52 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic_inc.S,v 1.2 2009/12/14 00:39:00 matt Exp $ */
+/* $NetBSD: atomic_inc.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -30,12 +30,21 @@
#include <machine/asm.h>
#include "atomic_op_asm.h"
-RCSID("$NetBSD: atomic_inc.S,v 1.2 2009/12/14 00:39:00 matt Exp $")
+RCSID("$NetBSD: atomic_inc.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $")
.text
+ .set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
.set noat
- .set noreorder
.set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
+ .set nomacro
+#endif /* _KERNEL_OPT */
+
LEAF(_atomic_inc_32)
1: INT_LL t0, 0(a0)
diff -r a018bb407673 -r ffeaa67c0bee common/lib/libc/arch/mips/atomic/atomic_or.S
--- a/common/lib/libc/arch/mips/atomic/atomic_or.S Sat Aug 27 13:19:39 2011 +0000
+++ b/common/lib/libc/arch/mips/atomic/atomic_or.S Sat Aug 27 13:23:52 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic_or.S,v 1.2 2009/12/14 00:39:00 matt Exp $ */
+/* $NetBSD: atomic_or.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -31,9 +31,17 @@
#include "atomic_op_asm.h"
.text
+ .set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
.set noat
- .set noreorder
.set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
+ .set nomacro
+#endif /* _KERNEL_OPT */
LEAF(_atomic_or_32)
1: INT_LL t0, 0(a0)
diff -r a018bb407673 -r ffeaa67c0bee common/lib/libc/arch/mips/atomic/atomic_swap.S
--- a/common/lib/libc/arch/mips/atomic/atomic_swap.S Sat Aug 27 13:19:39 2011 +0000
+++ b/common/lib/libc/arch/mips/atomic/atomic_swap.S Sat Aug 27 13:23:52 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: atomic_swap.S,v 1.2 2009/12/14 00:39:00 matt Exp $ */
+/* $NetBSD: atomic_swap.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $ */
/*-
* Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -30,12 +30,21 @@
#include <machine/asm.h>
#include "atomic_op_asm.h"
-RCSID("$NetBSD: atomic_swap.S,v 1.2 2009/12/14 00:39:00 matt Exp $")
+RCSID("$NetBSD: atomic_swap.S,v 1.3 2011/08/27 13:23:52 bouyer Exp $")
.text
+ .set noreorder
+#ifdef _KERNEL_OPT
+#include "opt_cputype.h"
+#ifndef MIPS3_LOONGSON2F
.set noat
- .set noreorder
.set nomacro
+#endif
+#else /* _KERNEL_OPT */
+ .set noat
+ .set nomacro
+#endif /* _KERNEL_OPT */
+
LEAF(_atomic_swap_32)
1: INT_LL v0, 0(a0)
diff -r a018bb407673 -r ffeaa67c0bee common/lib/libc/arch/mips/string/bcopy.S
--- a/common/lib/libc/arch/mips/string/bcopy.S Sat Aug 27 13:19:39 2011 +0000
+++ b/common/lib/libc/arch/mips/string/bcopy.S Sat Aug 27 13:23:52 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bcopy.S,v 1.3 2009/12/14 00:39:00 matt Exp $ */
+/* $NetBSD: bcopy.S,v 1.4 2011/08/27 13:23:52 bouyer Exp $ */
/*
* Mach Operating System
@@ -46,7 +46,7 @@
#if 0
RCSID("from: @(#)mips_bcopy.s 2.2 CMU 18/06/93")
#else
- RCSID("$NetBSD: bcopy.S,v 1.3 2009/12/14 00:39:00 matt Exp $")
+ RCSID("$NetBSD: bcopy.S,v 1.4 2011/08/27 13:23:52 bouyer Exp $")
#endif
#endif /* LIBC_SCCS and not lint */
@@ -170,8 +170,10 @@
PTR_ADDU DSTREG,1
4: # copydone
+ .set at #-mfix-loongson2f-btb
j ra
nop
+ .set noat
/*
* Copy from unaligned source to aligned dest.
@@ -264,8 +266,10 @@
PTR_SUBU DSTREG,1
4: # copydone
+ .set at #-mfix-loongson2f-btb
j ra
nop
+ .set noat
/*
* Copy from unaligned source to aligned dest.
diff -r a018bb407673 -r ffeaa67c0bee sys/arch/mips/include/cpuregs.h
--- a/sys/arch/mips/include/cpuregs.h Sat Aug 27 13:19:39 2011 +0000
+++ b/sys/arch/mips/include/cpuregs.h Sat Aug 27 13:23:52 2011 +0000
@@ -1,4 +1,20 @@
-/* $NetBSD: cpuregs.h,v 1.85 2011/08/02 05:12:32 matt Exp $ */
+/* $NetBSD: cpuregs.h,v 1.86 2011/08/27 13:23:52 bouyer Exp $ */
+
+/*
+ * Copyright (c) 2009 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
/*
* Copyright (c) 1992, 1993
@@ -970,4 +986,45 @@
#include <mips/rmi/rmixlreg.h>
#endif
+#ifdef MIPS3_LOONGSON2
+/*
+ * Loongson 2E/2F specific defines
+ */
+
+/*
+ * Address Window registers physical addresses
+ *
+ * The Loongson 2F processor has an AXI crossbar with four possible bus
+ * masters, each one having four programmable address windows.
+ *
+ * Each window is defined with three 64-bit registers:
+ * - a base address register, defining the address in the master address
+ * space (base register).
+ * - an address mask register, defining which address bits are valid in this
+ * window. A given address matches a window if (addr & mask) == base.
+ * - the location of the window base in the target, as well at the target
+ * number itself (mmap register). The lower 20 bits of the address are
+ * forced as zeroes regardless of their value in this register.
+ * The translated address is thus (addr & ~mask) | (mmap & ~0xfffff).
+ */
+
+#define LOONGSON_AWR_BASE_ADDRESS 0x3ff00000ULL
+
+#define LOONGSON_AWR_BASE(master, window) \
+ (LOONGSON_AWR_BASE_ADDRESS + (window) * 0x08 + (master) * 0x60 + 0x00)
+#define LOONGSON_AWR_SIZE(master, window) \
+ (LOONGSON_AWR_BASE_ADDRESS + (window) * 0x08 + (master) * 0x60 + 0x20)
+#define LOONGSON_AWR_MMAP(master, window) \
+ (LOONGSON_AWR_BASE_ADDRESS + (window) * 0x08 + (master) * 0x60 + 0x40)
+
+/*
+ * Bits in the diagnostic register
+ */
+
+#define COP_0_DIAG_ITLB_CLEAR 0x04
+#define COP_0_DIAG_BTB_CLEAR 0x02
+#define COP_0_DIAG_RAS_DISABLE 0x01
+
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