[src/trunk]: src/sys/arch/x86/x86 Be conservative when reading MSR_FSB_FREQ b...

[jym <jym%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/49dcf3e23eb5
branches:  trunk
changeset: 769810:49dcf3e23eb5
user:      jym <jym%NetBSD.org@localhost>
date:      Sat Sep 24 10:49:13 2011 +0000

description:
Be conservative when reading MSR_FSB_FREQ by using rdmsr_safe(). We cannot
tell in advance when new CPU model/family combo will come and trying to
read that MSR early during boot may cause unhandled faults.

diffstat:

 sys/arch/x86/x86/intel_busclock.c |  31 ++++++++++++++++++-------------
 1 files changed, 18 insertions(+), 13 deletions(-)

diffs (72 lines):

diff -r 40a13079c290 -r 49dcf3e23eb5 sys/arch/x86/x86/intel_busclock.c
--- a/sys/arch/x86/x86/intel_busclock.c Sat Sep 24 10:32:52 2011 +0000
+++ b/sys/arch/x86/x86/intel_busclock.c Sat Sep 24 10:49:13 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: intel_busclock.c,v 1.12 2011/02/23 11:43:23 jruoho Exp $       */
+/*     $NetBSD: intel_busclock.c,v 1.13 2011/09/24 10:49:13 jym Exp $  */
 
 /*-
  * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_busclock.c,v 1.12 2011/02/23 11:43:23 jruoho Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_busclock.c,v 1.13 2011/09/24 10:49:13 jym Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -104,13 +104,11 @@
                 * Newer CPUs will GP when attemping to access MSR_FSB_FREQ.
                 * In the long-term, use ACPI instead of all this.
                 */
-               switch (CPUID2EXTMODEL(ci->ci_signature)) {
-               case 0x2:
-                       aprint_debug("%s: unable to determine bus speed",
-                           device_xname(ci->ci_dev));
+               if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
+                       aprint_debug_dev(ci->ci_dev,
+                           "unable to determine bus speed");
                        goto print_msr;
                }
-               msr = rdmsr(MSR_FSB_FREQ);
                bus = (msr >> 0) & 0x7;
                switch (bus) {
                case 1:
@@ -123,7 +121,11 @@
                }
                break;
        case 0xd: /* Pentium M (90 nm, Dothan) */
-               msr = rdmsr(MSR_FSB_FREQ);
+               if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
+                       aprint_debug_dev(ci->ci_dev,
+                           "unable to determine bus speed");
+                       goto print_msr;
+               }
                bus = (msr >> 0) & 0x7;
                switch (bus) {
                case 0:
@@ -144,15 +146,18 @@
                 * Newer CPUs will GP when attemping to access MSR_FSB_FREQ.
                 * In the long-term, use ACPI instead of all this.
                 */
-               switch (CPUID2EXTMODEL(ci->ci_signature)) {
-               case 0x1:
-                       aprint_debug("%s: unable to determine bus speed",
-                           device_xname(ci->ci_dev));
+               if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
+                       aprint_debug_dev(ci->ci_dev,
+                           "unable to determine bus speed");
                        goto print_msr;
                }
                /* FALLTHROUGH */
        case 0xf: /* Core Xeon */
-               msr = rdmsr(MSR_FSB_FREQ);
+               if (rdmsr_safe(MSR_FSB_FREQ, &msr) == EFAULT) {
+                       aprint_debug_dev(ci->ci_dev,
+                           "unable to determine bus speed");
+                       goto print_msr;
+               }
                bus = (msr >> 0) & 0x7;
                switch (bus) {
                case 5: