[src/trunk]: src/sys/arch/x86/include Add definitions from [1] for the I/O AP...

[dyoung <dyoung%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/d7d90f941c81
branches:  trunk
changeset: 768491:d7d90f941c81
user:      dyoung <dyoung%NetBSD.org@localhost>
date:      Wed Aug 17 14:55:11 2011 +0000

description:
Add definitions from [1] for the I/O APIC's MSI Message Address & Data
registers.

[1] Intel Corporation, Intel 64 and IA-32 Architectures Software
    Developer's Manual, Volume 3A: System Programming Guide, Part 1,
    http://www.intel.com/Assets/PDF/manual/253668.pdf, Chapter 10,
    January, 2011.

diffstat:

 sys/arch/x86/include/i82093reg.h |  30 +++++++++++++++++++++++++++++-
 1 files changed, 29 insertions(+), 1 deletions(-)

diffs (44 lines):

diff -r c28e14014b56 -r d7d90f941c81 sys/arch/x86/include/i82093reg.h
--- a/sys/arch/x86/include/i82093reg.h  Wed Aug 17 14:52:09 2011 +0000
+++ b/sys/arch/x86/include/i82093reg.h  Wed Aug 17 14:55:11 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: i82093reg.h,v 1.2 2008/04/28 20:23:40 martin Exp $ */
+/*     $NetBSD: i82093reg.h,v 1.3 2011/08/17 14:55:11 dyoung Exp $ */
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -36,6 +36,34 @@
  */
 #define IOAPIC_BASE_DEFAULT    0xfec00000
 
+#define IOAPIC_MSIADDR_BASE            0xfee00000
+#define        IOAPIC_MSIADDR_DSTID_MASK       __BITS(19, 12)
+#define        IOAPIC_MSIADDR_RSVD0_MASK       __BITS(11, 4)
+#define        IOAPIC_MSIADDR_RH               __BIT(3)
+#define        IOAPIC_MSIADDR_DM               __BIT(2)
+#define        IOAPIC_MSIADDR_RSVD1_MASK       __BITS(1, 0)
+
+#define        IOAPIC_MSIDATA_VECTOR_MASK      __BITS(7, 0)
+#define        IOAPIC_MSIDATA_DM_MASK          __BITS(10, 8)
+#define        IOAPIC_MSIDATA_DM_FIXED         __SHIFTIN(0, IOAPIC_MSIDATA_DM_MASK)
+#define        IOAPIC_MSIDATA_DM_LOPRI         __SHIFTIN(1, IOAPIC_MSIDATA_DM_MASK)
+#define        IOAPIC_MSIDATA_DM_SMI           __SHIFTIN(2, IOAPIC_MSIDATA_DM_MASK)
+#define        IOAPIC_MSIDATA_DM_RSVD0         __SHIFTIN(3, IOAPIC_MSIDATA_DM_MASK)
+#define        IOAPIC_MSIDATA_DM_NMI           __SHIFTIN(4, IOAPIC_MSIDATA_DM_MASK)
+#define        IOAPIC_MSIDATA_DM_INIT          __SHIFTIN(5, IOAPIC_MSIDATA_DM_MASK)
+#define        IOAPIC_MSIDATA_DM_RSVD1         __SHIFTIN(6, IOAPIC_MSIDATA_DM_MASK)
+#define        IOAPIC_MSIDATA_DM_EXTINT        __SHIFTIN(7, IOAPIC_MSIDATA_DM_MASK)
+#define        IOAPIC_MSIDATA_RSVD0_MASK       __BITS(13, 11)
+#define        IOAPIC_MSIDATA_LEVEL_MASK       __BIT(14)
+#define        IOAPIC_MSIDATA_LEVEL_DEASSERT   __SHIFTIN(0, IOAPIC_MSIDATA_LEVEL_MASK)
+#define        IOAPIC_MSIDATA_LEVEL_ASSERT     __SHIFTIN(1, IOAPIC_MSIDATA_LEVEL_MASK)
+#define        IOAPIC_MSIDATA_TRGMODE_MASK     __BIT(15)
+#define        IOAPIC_MSIDATA_TRGMODE_EDGE     \
+    __SHIFTIN(0, IOAPIC_MSIDATA_TRGMODE_MASK)
+#define        IOAPIC_MSIDATA_TRGMODE_LEVEL    \
+    __SHIFTIN(1, IOAPIC_MSIDATA_TRGMODE_MASK)
+#define        IOAPIC_MSIDATA_RSVD1_MASK       __BITS(31, 16)
+
 /*
  * Memory-space registers.
  */