[src/trunk]: src/sys/dev/ic reduce the polling interval to 2 seconds, and try...

[christos <christos%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/299cfc03d797
branches:  trunk
changeset: 772986:299cfc03d797
user:      christos <christos%NetBSD.org@localhost>
date:      Mon Jan 23 04:12:26 2012 +0000

description:
reduce the polling interval to 2 seconds, and try harder to get interrupts
working.

diffstat:

 sys/dev/ic/tpm.c    |  30 +++++++++++++++++++++++-------
 sys/dev/ic/tpmreg.h |   8 +++++---
 2 files changed, 28 insertions(+), 10 deletions(-)

diffs (93 lines):

diff -r 49b416e3e6af -r 299cfc03d797 sys/dev/ic/tpm.c
--- a/sys/dev/ic/tpm.c  Mon Jan 23 03:22:41 2012 +0000
+++ b/sys/dev/ic/tpm.c  Mon Jan 23 04:12:26 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: tpm.c,v 1.3 2012/01/22 20:41:25 christos Exp $ */
+/*     $NetBSD: tpm.c,v 1.4 2012/01/23 04:12:26 christos Exp $ */
 /*
  * Copyright (c) 2008, 2009 Michael Shalayeff
  * Copyright (c) 2009, 2010 Hans-Jörg Höxer
@@ -18,7 +18,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tpm.c,v 1.3 2012/01/22 20:41:25 christos Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tpm.c,v 1.4 2012/01/23 04:12:26 christos Exp $");
 
 #if 0
 #define        TPM_DEBUG 
@@ -132,24 +132,40 @@
        }
 
        /* Ack and disable all interrupts. */
+       r = bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE);
        bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE,
-           bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE) &
-           ~TPM_GLOBAL_INT_ENABLE);
+           r & ~TPM_GLOBAL_INT_ENABLE);
        bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS,
            bus_space_read_4(sc->sc_bt, sc->sc_bh, TPM_INT_STATUS));
+#ifdef TPM_DEBUG
+       char buf[128];
+       snprintb(buf, sizeof(buf), TPM_INTERRUPT_ENABLE_BITS, r);
+       aprint_debug_dev(sc->sc_dev, "%s: before ien %s\n", __func__, buf);
+#endif
 
        /* Program interrupt vector. */
        bus_space_write_1(sc->sc_bt, sc->sc_bh, TPM_INT_VECTOR, irq);
        sc->sc_vector = irq;
 
        /* Program interrupt type. */
+       r &= ~(TPM_INT_EDGE_RISING|TPM_INT_EDGE_FALLING|TPM_INT_LEVEL_HIGH|
+           TPM_INT_LEVEL_LOW);
+       r |= TPM_GLOBAL_INT_ENABLE|TPM_CMD_READY_INT|TPM_LOCALITY_CHANGE_INT|
+           TPM_STS_VALID_INT|TPM_DATA_AVAIL_INT;
        if (sc->sc_capabilities & TPM_INTF_INT_EDGE_RISING)
-               r = TPM_INT_EDGE_RISING;
+               r |= TPM_INT_EDGE_RISING;
+       else if (sc->sc_capabilities & TPM_INTF_INT_EDGE_FALLING)
+               r |= TPM_INT_EDGE_FALLING;
        else if (sc->sc_capabilities & TPM_INTF_INT_LEVEL_HIGH)
-               r = TPM_INT_LEVEL_HIGH;
+               r |= TPM_INT_LEVEL_HIGH;
        else
-               r = TPM_INT_LEVEL_LOW;
+               r |= TPM_INT_LEVEL_LOW;
+
        bus_space_write_4(sc->sc_bt, sc->sc_bh, TPM_INTERRUPT_ENABLE, r);
+#ifdef TPM_DEBUG
+       snprintb(buf, sizeof(buf), TPM_INTERRUPT_ENABLE_BITS, r);
+       aprint_debug_dev(sc->sc_dev, "%s: after ien %s\n", __func__, buf);
+#endif
 
        return 0;
 }
diff -r 49b416e3e6af -r 299cfc03d797 sys/dev/ic/tpmreg.h
--- a/sys/dev/ic/tpmreg.h       Mon Jan 23 03:22:41 2012 +0000
+++ b/sys/dev/ic/tpmreg.h       Mon Jan 23 04:12:26 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: tpmreg.h,v 1.2 2012/01/22 20:41:25 christos Exp $      */
+/*     $NetBSD: tpmreg.h,v 1.3 2012/01/23 04:12:26 christos Exp $      */
 
 /*
  * Copyright (c) 2008, 2009 Michael Shalayeff
@@ -46,7 +46,9 @@
 #define        TPM_STS_VALID_INT       0x00000002      /* int on TPM_STS_VALID is set */
 #define        TPM_DATA_AVAIL_INT      0x00000001      /* int on TPM_STS_DATA_AVAIL is set */
 #define        TPM_INTERRUPT_ENABLE_BITS \
-    "\020\040ENA\010RDY\03LOCH\02STSV\01DRDY"
+    "\177\020b\0DRDY\0b\1STSVALID\0b\2LOCCHG\0" \
+    "F\3\2:\0HIGH\0:\1LOW\0:\2RISE\0:\3FALL\0" \
+    "b\7IRDY\0b\x1fGIENABLE\0"
 
 #define        TPM_INT_VECTOR          0x000c  /* 8 bit reg for 4 bit irq vector */
 #define        TPM_INT_STATUS          0x0010  /* bits are & 0x87 from TPM_INTERRUPT_ENABLE */
@@ -84,7 +86,7 @@
 
 #define        TPM_ACCESS_TMO  2000            /* 2sec */
 #define        TPM_READY_TMO   2000            /* 2sec */
-#define        TPM_READ_TMO    120000          /* 2 minutes */
+#define        TPM_READ_TMO    2000            /* 2sec */
 #define TPM_BURST_TMO  2000            /* 2sec */
 
 #define        TPM_LEGACY_BUSY 0x01