[src/trunk]: src/external/gpl3/gdb/dist/gdb Since sh3 has got PT_STEP, nuke s...

[uwe <uwe%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/848a726b2e6f
branches:  trunk
changeset: 770758:848a726b2e6f
user:      uwe <uwe%NetBSD.org@localhost>
date:      Mon Oct 31 23:23:52 2011 +0000

description:
Since sh3 has got PT_STEP, nuke software single-stepping entirely.

diffstat:

 external/gpl3/gdb/dist/gdb/shnbsd-tdep.c |  198 -------------------------------
 1 files changed, 0 insertions(+), 198 deletions(-)

diffs (215 lines):

diff -r ffd3393bfada -r 848a726b2e6f external/gpl3/gdb/dist/gdb/shnbsd-tdep.c
--- a/external/gpl3/gdb/dist/gdb/shnbsd-tdep.c  Mon Oct 31 23:10:16 2011 +0000
+++ b/external/gpl3/gdb/dist/gdb/shnbsd-tdep.c  Mon Oct 31 23:23:52 2011 +0000
@@ -175,200 +175,6 @@
     regcache_raw_collect (regcache, GBR_REGNUM, regs + (21 * 4));
 }
 
-/* Hitachi SH instruction encoding masks and opcodes */
-
-/*
- *     xxxx x--x ---- ----     0xf900 mask
- *     1001 1**1 ---- ----     0x8900 match
- * BT  1000 1001 dddd dddd
- * BF  1000 1011 dddd dddd
- * BT/S        1000 1101 dddd dddd
- * BF/S        1000 1111 dddd dddd
- *     ---- --x- ---- ----     T or F?
- *     ---- -x-- ---- ----     has delay slot
- */
-#define CONDITIONAL_BRANCH_P(insn) (((insn) & 0xf900) == 0x8900)
-#define CONDITIONAL_BRANCH_TAKEN_P(insn, sr) ((((insn) >> 9) ^ sr) & 0x1)
-#define CONDITIONAL_BRANCH_SLOT_P(insn) (((insn) & 0x0400) != 0)
-
-/*
- *     xxx- ---- ---- ----     0xe000 mask
- *     101* ---- ---- ----     0xa000 match
- * BRA 1010 dddd dddd dddd
- * BSR 1011 dddd dddd dddd
- */
-#define BRANCH_P(insn) (((insn) & 0xe000) == 0xa000)
-
-/*
- *     xxxx ---- xx-x xxxx     0xf0df mask
- *     0000 ---- 00*0 0011     0x0003 match
- * BSRF        0000 rrrr 0000 0011
- * BRAF        0000 rrrr 0010 0011
- */
-#define BRANCH_FAR_P(insn) (((insn) & 0xf0df) == 0x0003)
-#define BRANCH_FAR_REG(insn) (((insn) >> 8) & 0xf)
-
-/*
- *     xxxx ---- xx-x xxxx     0xf0df mask
- *     0100 ---- 00*0 1011     0x400b match
- * JSR 0100 rrrr 0000 1011
- * JMP 0100 rrrr 0010 1011
- */
-#define JUMP_P(insn) (((insn) & 0xf0df) == 0x400b)
-#define JUMP_REG(insn) (((insn) >> 8) & 0xf)
-
-/*
- * RTS 0000 0000 0000 1011
- * RTE 0000 0000 0010 1011
- */
-#define RTS_INSN 0x000b
-#define RTE_INSN 0x002b
-
-/*
- *     xxxx xxxx ---- ----     0xff00 mask
- *TRAPA 1100 0011 tttt tttt    0xc300 match
- */
-#define TRAPA_P(insn) (((insn) & 0xff00) == 0xc300)
-
-
-/* signed 8-bit displacement */
-static int
-shnbsd_displacement_8 (unsigned short insn)
-{
-  int displacement;
-
-  if (insn & 0x80)
-    displacement = insn | 0xffffff00;
-  else
-    displacement = insn & 0x000000ff;
-
-  return displacement;
-}
-
-/* signed 12-bit displacement */
-static int
-shnbsd_displacement_12 (unsigned short insn)
-{
-  int displacement;
-
-  if (insn & 0x800)
-    displacement = insn | 0xfffff000;
-  else
-    displacement = insn & 0x00000fff;
-
-  return displacement;
-}
-
-static CORE_ADDR
-shnbsd_get_next_pc (struct regcache *regcache, CORE_ADDR pc)
-{
-  unsigned short insn;
-  ULONGEST sr;
-  LONGEST displacement;
-  int reg;
-  CORE_ADDR next_pc;
-  int delay_slot;
-  enum bfd_endian byte_order = gdbarch_byte_order (target_gdbarch);
-
-  insn = read_memory_integer (pc, sizeof (insn), byte_order);
-  delay_slot = 0;
-
-  /* As we cannot step through the delay slot, we break at the target
-     address of the control transfer.  One tricky case is when the
-     target of the jump is the delay slot of that same instruction
-     (e.g. PLT entries use such code).  In that case we cannot set the
-     break to the target, as trapa is illegal in the delay slot.  Set
-     break to the next instruction instead, we are guaranteed to
-     arrive there, as control transfers are illegal in the delay
-     slot. */
-
-  /* BT, BF, BT/S, BF/S */
-  if (CONDITIONAL_BRANCH_P(insn))
-    {
-      regcache_cooked_read_unsigned (regcache, SR_REGNUM, &sr);
-
-      delay_slot = CONDITIONAL_BRANCH_SLOT_P(insn);
-      if (!CONDITIONAL_BRANCH_TAKEN_P(insn, sr))
-       next_pc = pc + (delay_slot ? 4 : 2);
-      else
-       {
-         displacement = shnbsd_displacement_8 (insn);
-
-         next_pc = pc + 4 + (displacement << 1);
-       }
-    }
-
-  /* BRA, BSR */
-  else if (BRANCH_P(insn))
-    {
-      displacement = shnbsd_displacement_12 (insn);
-
-      next_pc = pc + 4 + (displacement << 1);
-      delay_slot = 1;
-    }
-
-  /* BRAF, BSRF */
-  else if (BRANCH_FAR_P(insn))
-    {
-      regcache_cooked_read_signed (regcache, BRANCH_FAR_REG(insn),
-         &displacement);
-      next_pc = pc + 4 + displacement;
-      delay_slot = 1;
-    }
-
-  /* JMP, JSR */
-  else if (JUMP_P(insn))
-    {
-      regcache_cooked_read_unsigned (regcache, JUMP_REG(insn), &next_pc);
-      delay_slot = 1;
-    }
-
-  /* RTS */
-  else if (insn == RTS_INSN)
-    {
-      regcache_cooked_read_unsigned (regcache, PR_REGNUM, &next_pc);
-      delay_slot = 1;
-    }
-
-  /* RTE - XXX: privileged */
-  else if (insn == RTE_INSN)
-    {
-      regcache_cooked_read_unsigned (regcache, SPC_REGNUM, &next_pc);
-      delay_slot = 1;
-    }
-
-  /* TRAPA */
-  else if (TRAPA_P(insn))
-    next_pc = pc + 2;          /* XXX: after return from syscall */
-
-  /* not a control transfer instruction */
-  else
-    next_pc = pc + 2;
-
-  /* jumping to our own delay slot? */
-  if (delay_slot && next_pc == pc + 2)
-    next_pc += 2;
-
-  return next_pc;
-}
-
-/* Single step (in a painstaking fashion) by inspecting the current
-   instruction and setting a breakpoint on the "next" instruction
-   which would be executed.
- */
-int
-shnbsd_software_single_step (struct frame_info *frame)
-{
-  struct gdbarch *gdbarch = get_frame_arch (frame);
-  struct address_space *aspace = get_frame_address_space (frame);
-  struct regcache  *regcache= get_current_regcache ();
-  CORE_ADDR pc = regcache_read_pc (regcache);
-  CORE_ADDR next_pc = shnbsd_get_next_pc (regcache, pc);
-
-  insert_single_step_breakpoint (gdbarch, aspace, next_pc);
-  return 1;
-}
-
 /* SH register sets.  */
 
 static struct regset shnbsd_gregset =
@@ -473,10 +279,6 @@
 shnbsd_init_abi (struct gdbarch_info info,
                   struct gdbarch *gdbarch)
 {
-  /* NetBSD SuperH ports do not provide single step support via ptrace(2);
-     we must use software single-stepping.  */
-  set_gdbarch_software_single_step (gdbarch, shnbsd_software_single_step);
-
   set_gdbarch_regset_from_core_section
     (gdbarch, shnbsd_regset_from_core_section);