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[src/trunk]: src/sys/arch/x86 bring in this change from openbsd:
details: https://anonhg.NetBSD.org/src/rev/1d52876280a3
branches: trunk
changeset: 778614:1d52876280a3
user: chs <chs%NetBSD.org@localhost>
date: Fri Apr 06 17:23:39 2012 +0000
description:
bring in this change from openbsd:
Implement the AMD suggested workaround for family 10h & 12h errata 721
"Processor May Incorrectly Update Stack Pointer" by setting a bit
marked 'reserved' in an MSR that is only "documented" to exist on 12h.
diffstat:
sys/arch/x86/include/specialreg.h | 5 ++++-
sys/arch/x86/x86/errata.c | 23 ++++++++++++++++++++---
2 files changed, 24 insertions(+), 4 deletions(-)
diffs (84 lines):
diff -r ed4a9c7354e2 -r 1d52876280a3 sys/arch/x86/include/specialreg.h
--- a/sys/arch/x86/include/specialreg.h Fri Apr 06 17:16:30 2012 +0000
+++ b/sys/arch/x86/include/specialreg.h Fri Apr 06 17:23:39 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: specialreg.h,v 1.56 2012/03/02 16:41:00 bouyer Exp $ */
+/* $NetBSD: specialreg.h,v 1.57 2012/04/06 17:23:39 chs Exp $ */
/*-
* Copyright (c) 1991 The Regents of the University of California.
@@ -516,6 +516,9 @@
#define BU_CFG_WBPFSMCCHKDIS 0x0000200000000000ULL
#define BU_CFG_WBENHWSBDIS 0x0001000000000000ULL
+#define MSR_DE_CFG 0xc0011029
+#define DE_CFG_ERRATA_721 0x00000001
+
/* AMD Family10h MSRs */
#define MSR_OSVW_ID_LENGTH 0xc0010140
#define MSR_OSVW_STATUS 0xc0010141
diff -r ed4a9c7354e2 -r 1d52876280a3 sys/arch/x86/x86/errata.c
--- a/sys/arch/x86/x86/errata.c Fri Apr 06 17:16:30 2012 +0000
+++ b/sys/arch/x86/x86/errata.c Fri Apr 06 17:23:39 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: errata.c,v 1.19 2010/07/23 22:31:35 cegger Exp $ */
+/* $NetBSD: errata.c,v 1.20 2012/04/06 17:23:39 chs Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -45,7 +45,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.19 2010/07/23 22:31:35 cegger Exp $");
+__KERNEL_RCSID(0, "$NetBSD: errata.c,v 1.20 2012/04/06 17:23:39 chs Exp $");
#include <sys/types.h>
#include <sys/systm.h>
@@ -69,7 +69,8 @@
typedef enum cpurev {
BH_E4, CH_CG, CH_D0, DH_CG, DH_D0, DH_E3, DH_E6, JH_E1,
JH_E6, SH_B0, SH_B3, SH_C0, SH_CG, SH_D0, SH_E4, SH_E5,
- DR_BA, DR_B2, DR_B3,
+ DR_BA, DR_B2, DR_B3, RB_C2, RB_C3, BL_C2, BL_C3, DA_C2,
+ DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0,
OINK
} cpurev_t;
@@ -85,6 +86,10 @@
SH_D0, 0x0010f40, SH_D0, 0x0010f50, SH_D0, 0x0010f70,
SH_E4, 0x0020f51, SH_E4, 0x0020f71, SH_E5, 0x0020f42,
DR_BA, 0x0100f2a, DR_B2, 0x0100f22, DR_B3, 0x0100f23,
+ RB_C2, 0x0100f42, RB_C3, 0x0100f43, BL_C2, 0x0100f52,
+ BL_C3, 0x0100f53, DA_C2, 0x0100f62, DA_C3, 0x0100f63,
+ HY_D0, 0x0100f80, HY_D1, 0x0100f81, HY_D1_G34R1, 0x0100f91,
+ PH_E0, 0x0100fa0, LN_B0, 0x0300f10,
OINK
};
@@ -132,6 +137,11 @@
DR_BA, DR_B2, DR_B3, OINK
};
+static const uint8_t x86_errata_set11[] = {
+ DR_BA, DR_B2, DR_B3, RB_C2, RB_C3, BL_C2, BL_C3, DA_C2,
+ DA_C3, HY_D0, HY_D1, HY_D1_G34R1, PH_E0, LN_B0, OINK
+};
+
static bool x86_errata_setmsr(struct cpu_info *, errata_t *);
static bool x86_errata_testmsr(struct cpu_info *, errata_t *);
@@ -268,6 +278,13 @@
309, FALSE, MSR_BU_CFG, x86_errata_set9,
x86_errata_testmsr, BU_CFG_ERRATA_309
},
+ /*
+ * 721: Processor May Incorrectly Update Stack Pointer
+ */
+ {
+ 721, FALSE, MSR_DE_CFG, x86_errata_set11,
+ x86_errata_setmsr, DE_CFG_ERRATA_721
+ },
};
static bool
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