[src/trunk]: src/sys/arch/sparc64 move the tlb flush routines into cache.h to...

[mrg <mrg%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/daf81017b1eb
branches:  trunk
changeset: 752346:daf81017b1eb
user:      mrg <mrg%NetBSD.org@localhost>
date:      Wed Feb 24 04:48:28 2010 +0000

description:
move the tlb flush routines into cache.h to avoid machine/pmap.h polution.

diffstat:

 sys/arch/sparc64/include/pmap.h  |  34 +---------------------------------
 sys/arch/sparc64/sparc64/cache.h |  34 +++++++++++++++++++++++++++++++++-
 2 files changed, 34 insertions(+), 34 deletions(-)

diffs (96 lines):

diff -r 3161259187e1 -r daf81017b1eb sys/arch/sparc64/include/pmap.h
--- a/sys/arch/sparc64/include/pmap.h   Wed Feb 24 04:32:58 2010 +0000
+++ b/sys/arch/sparc64/include/pmap.h   Wed Feb 24 04:48:28 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.h,v 1.49 2010/02/24 01:58:52 mrg Exp $    */
+/*     $NetBSD: pmap.h,v 1.50 2010/02/24 04:48:28 mrg Exp $    */
 
 /*-
  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -204,38 +204,6 @@
 void           switchexit(struct lwp *, int);
 void           pmap_kprotect(vaddr_t, vm_prot_t);
 
-/* SPARC64 specific */
-/* Assembly routines to flush TLB mappings */
-void sp_tlb_flush_pte_us(vaddr_t, int);
-void sp_tlb_flush_pte_usiii(vaddr_t, int);
-void sp_tlb_flush_all_us(void);
-void sp_tlb_flush_all_usiii(void);
-
-static __inline__ void
-sp_tlb_flush_pte(vaddr_t va, int ctx)
-{
-       if (CPU_IS_USIII_UP())
-               sp_tlb_flush_pte_usiii(va, ctx);
-       else
-               sp_tlb_flush_pte_us(va, ctx);
-}
-
-static __inline__ void
-sp_tlb_flush_all(void)
-{
-       if (CPU_IS_USIII_UP())
-               sp_tlb_flush_all_usiii();
-       else
-               sp_tlb_flush_all_us();
-}
-
-#ifdef MULTIPROCESSOR
-void smp_tlb_flush_pte(vaddr_t, pmap_t);
-#define        tlb_flush_pte(va,pm)    smp_tlb_flush_pte(va, pm)
-#else
-#define        tlb_flush_pte(va,pm)    sp_tlb_flush_pte(va, (pm)->pm_ctx)
-#endif
-
 /* Installed physical memory, as discovered during bootstrap. */
 extern int phys_installed_size;
 extern struct mem_region *phys_installed;
diff -r 3161259187e1 -r daf81017b1eb sys/arch/sparc64/sparc64/cache.h
--- a/sys/arch/sparc64/sparc64/cache.h  Wed Feb 24 04:32:58 2010 +0000
+++ b/sys/arch/sparc64/sparc64/cache.h  Wed Feb 24 04:48:28 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache.h,v 1.12 2010/02/22 00:16:31 mrg Exp $ */
+/*     $NetBSD: cache.h,v 1.13 2010/02/24 04:48:29 mrg Exp $ */
 
 /*
  * Copyright (c) 1996
@@ -110,6 +110,38 @@
                blast_icache_us();
 }
 
+/* SPARC64 specific */
+/* Assembly routines to flush TLB mappings */
+void sp_tlb_flush_pte_us(vaddr_t, int);
+void sp_tlb_flush_pte_usiii(vaddr_t, int);
+void sp_tlb_flush_all_us(void);
+void sp_tlb_flush_all_usiii(void);
+
+static __inline__ void
+sp_tlb_flush_pte(vaddr_t va, int ctx)
+{
+       if (CPU_IS_USIII_UP())
+               sp_tlb_flush_pte_usiii(va, ctx);
+       else
+               sp_tlb_flush_pte_us(va, ctx);
+}
+
+static __inline__ void
+sp_tlb_flush_all(void)
+{
+       if (CPU_IS_USIII_UP())
+               sp_tlb_flush_all_usiii();
+       else
+               sp_tlb_flush_all_us();
+}
+
+#ifdef MULTIPROCESSOR
+void smp_tlb_flush_pte(vaddr_t, pmap_t);
+#define        tlb_flush_pte(va,pm)    smp_tlb_flush_pte(va, pm)
+#else
+#define        tlb_flush_pte(va,pm)    sp_tlb_flush_pte(va, (pm)->pm_ctx)
+#endif
+
 /* Various cache size/line sizes */
 extern int     ecache_min_line_size;
 extern int     dcache_line_size;