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[src/trunk]: src/sys/arch/arm Add the 'Z' to the 1176 cpu product name.
details: https://anonhg.NetBSD.org/src/rev/5a1cee63bc68
branches: trunk
changeset: 779338:5a1cee63bc68
user: skrll <skrll%NetBSD.org@localhost>
date: Sun May 20 17:56:30 2012 +0000
description:
Add the 'Z' to the 1176 cpu product name.
ok matt@
diffstat:
sys/arch/arm/arm/cpufunc.c | 8 ++++----
sys/arch/arm/arm32/cpu.c | 6 +++---
sys/arch/arm/include/armreg.h | 4 ++--
3 files changed, 9 insertions(+), 9 deletions(-)
diffs (76 lines):
diff -r eba2963625bf -r 5a1cee63bc68 sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c Sun May 20 14:08:18 2012 +0000
+++ b/sys/arch/arm/arm/cpufunc.c Sun May 20 17:56:30 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.104 2012/01/31 04:31:37 matt Exp $ */
+/* $NetBSD: cpufunc.c,v 1.105 2012/05/20 17:56:30 skrll Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.104 2012/01/31 04:31:37 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.105 2012/05/20 17:56:30 skrll Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -1646,10 +1646,10 @@
#if defined(CPU_ARM11)
if (cputype == CPU_ID_ARM1136JS ||
cputype == CPU_ID_ARM1136JSR1 ||
- cputype == CPU_ID_ARM1176JS) {
+ cputype == CPU_ID_ARM1176JZS) {
cpufuncs = arm11_cpufuncs;
#if defined(CPU_ARM1136)
- if (cputype != CPU_ID_ARM1176JS) {
+ if (cputype != CPU_ID_ARM1176JZS) {
cpufuncs = arm1136_cpufuncs;
if (cputype == CPU_ID_ARM1136JS)
cpufuncs.cf_sleep = arm1136_sleep_rev0;
diff -r eba2963625bf -r 5a1cee63bc68 sys/arch/arm/arm32/cpu.c
--- a/sys/arch/arm/arm32/cpu.c Sun May 20 14:08:18 2012 +0000
+++ b/sys/arch/arm/arm32/cpu.c Sun May 20 17:56:30 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.78 2011/03/10 08:07:08 bsh Exp $ */
+/* $NetBSD: cpu.c,v 1.79 2012/05/20 17:56:30 skrll Exp $ */
/*
* Copyright (c) 1995 Mark Brinicombe.
@@ -46,7 +46,7 @@
#include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.78 2011/03/10 08:07:08 bsh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.79 2012/05/20 17:56:30 skrll Exp $");
#include <sys/systm.h>
#include <sys/malloc.h>
@@ -409,7 +409,7 @@
pN_steppings },
{ CPU_ID_ARM1136JSR1, CPU_CLASS_ARM11J, "ARM1136J-S r1",
pN_steppings },
- { CPU_ID_ARM1176JS, CPU_CLASS_ARM11J, "ARM1176J-S r0",
+ { CPU_ID_ARM1176JZS, CPU_CLASS_ARM11J, "ARM1176JZ-S r0",
pN_steppings },
{ CPU_ID_ARM11MPCORE, CPU_CLASS_ARM11J, "ARM11 MPCore",
diff -r eba2963625bf -r 5a1cee63bc68 sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h Sun May 20 14:08:18 2012 +0000
+++ b/sys/arch/arm/include/armreg.h Sun May 20 17:56:30 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: armreg.h,v 1.48 2011/06/30 20:09:20 wiz Exp $ */
+/* $NetBSD: armreg.h,v 1.49 2012/05/20 17:56:30 skrll Exp $ */
/*
* Copyright (c) 1998, 2001 Ben Harris
@@ -199,7 +199,7 @@
#define CPU_ID_ARM11MPCORE 0x410fb020
#define CPU_ID_ARM1136JS 0x4107b360
#define CPU_ID_ARM1136JSR1 0x4117b360
-#define CPU_ID_ARM1176JS 0x410fb760
+#define CPU_ID_ARM1176JZS 0x410fb760
#define CPU_ID_CORTEXA8R1 0x411fc080
#define CPU_ID_CORTEXA8R2 0x412fc080
#define CPU_ID_CORTEXA8R3 0x413fc080
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