[src/trunk]: src/sys/arch/sparc64/include add some bits to set to access all ...

[mrg <mrg%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/18442c15977b
branches:  trunk
changeset: 752322:18442c15977b
user:      mrg <mrg%NetBSD.org@localhost>
date:      Tue Feb 23 05:24:50 2010 +0000

description:
add some bits to set to access all the cheetah dtlb/itlb's.

diffstat:

 sys/arch/sparc64/include/ctlreg.h |  7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diffs (21 lines):

diff -r 9c0e14d8d70a -r 18442c15977b sys/arch/sparc64/include/ctlreg.h
--- a/sys/arch/sparc64/include/ctlreg.h Tue Feb 23 01:24:44 2010 +0000
+++ b/sys/arch/sparc64/include/ctlreg.h Tue Feb 23 05:24:50 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ctlreg.h,v 1.51 2010/02/21 00:57:44 mrg Exp $ */
+/*     $NetBSD: ctlreg.h,v 1.52 2010/02/23 05:24:50 mrg Exp $ */
 
 /*
  * Copyright (c) 1996-2002 Eduardo Horvath
@@ -374,6 +374,11 @@
 #define TLB_SIZE_CHEETAH_D16           16
 #define TLB_SIZE_CHEETAH_D512_0                512
 #define TLB_SIZE_CHEETAH_D512_1                512
+#define TLB_CHEETAH_I16                        (0 << 16)
+#define TLB_CHEETAH_I128               (2 << 16)
+#define TLB_CHEETAH_D16                        (0 << 16)
+#define TLB_CHEETAH_D512_0             (2 << 16)
+#define TLB_CHEETAH_D512_1             (3 << 16)
 
 /*
  * Interrupt registers.  This really gets hairy.