[src/trunk]: src/sys/arch/arm Begin support for Cortex A5, A7, A15 and expand...

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/03d50cdb7992
branches:  trunk
changeset: 780148:03d50cdb7992
user:      matt <matt%NetBSD.org@localhost>
date:      Fri Jul 13 05:23:29 2012 +0000

description:
Begin support for Cortex A5, A7, A15 and expand A8 and A9 definitions.
Instead of testing all possible CPUids for a cortex, we know what range
a cortex will be so mask out the insignificant parts and do a single test.

diffstat:

 sys/arch/arm/arm/cpufunc.c    |   9 +++------
 sys/arch/arm/conf/files.arm   |   5 ++++-
 sys/arch/arm/include/armreg.h |  10 ++++++++--
 3 files changed, 15 insertions(+), 9 deletions(-)

diffs (78 lines):

diff -r 93038fc0c616 -r 03d50cdb7992 sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Fri Jul 13 01:15:27 2012 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Fri Jul 13 05:23:29 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.105 2012/05/20 17:56:30 skrll Exp $      */
+/*     $NetBSD: cpufunc.c,v 1.106 2012/07/13 05:23:30 matt Exp $       */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.105 2012/05/20 17:56:30 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.106 2012/07/13 05:23:30 matt Exp $");
 
 #include "opt_compat_netbsd.h"
 #include "opt_cpuoptions.h"
@@ -1851,10 +1851,7 @@
        }
 #endif /* CPU_XSCALE_IXP425 */
 #if defined(CPU_CORTEX)
-       if (cputype == CPU_ID_CORTEXA8R1 ||
-           cputype == CPU_ID_CORTEXA8R2 ||
-           cputype == CPU_ID_CORTEXA8R3 ||
-           cputype == CPU_ID_CORTEXA9R1) {
+       if (CPU_ID_CORTEX_P(cputype)) {
                cpufuncs = cortex_cpufuncs;
                cpu_reset_needs_v4_MMU_disable = 1;     /* V4 or higher */
                cpu_do_powersave = 1;                   /* Enable powersave */
diff -r 93038fc0c616 -r 03d50cdb7992 sys/arch/arm/conf/files.arm
--- a/sys/arch/arm/conf/files.arm       Fri Jul 13 01:15:27 2012 +0000
+++ b/sys/arch/arm/conf/files.arm       Fri Jul 13 05:23:29 2012 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.arm,v 1.103 2011/12/11 03:30:23 kiyohara Exp $
+#      $NetBSD: files.arm,v 1.104 2012/07/13 05:23:29 matt Exp $
 
 # temporary define to allow easy moving to ../arch/arm/arm32
 defflag                                ARM32
@@ -16,8 +16,11 @@
 defflag        opt_cputypes.h          CPU_ARM1136: CPU_ARM11
 defflag        opt_cputypes.h          CPU_ARM1176: CPU_ARM11
 defflag        opt_cputypes.h          CPU_ARM11MPCORE: CPU_ARM11
+defflag        opt_cputypes.h          CPU_CORTEXA5: CPU_CORTEX
+defflag        opt_cputypes.h          CPU_CORTEXA7: CPU_CORTEX
 defflag        opt_cputypes.h          CPU_CORTEXA8: CPU_CORTEX
 defflag        opt_cputypes.h          CPU_CORTEXA9: CPU_CORTEX
+defflag        opt_cputypes.h          CPU_CORTEXA15: CPU_CORTEX
 defflag opt_cputypes.h         FPU_VFP
 
 defparam opt_cpuoptions.h      XSCALE_CCLKCFG
diff -r 93038fc0c616 -r 03d50cdb7992 sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h     Fri Jul 13 01:15:27 2012 +0000
+++ b/sys/arch/arm/include/armreg.h     Fri Jul 13 05:23:29 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armreg.h,v 1.51 2012/05/20 18:08:05 skrll Exp $        */
+/*     $NetBSD: armreg.h,v 1.52 2012/07/13 05:23:30 matt Exp $ */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -201,10 +201,16 @@
 #define CPU_ID_ARM1136JSR1     0x4117b360
 #define CPU_ID_ARM1156T2S      0x4107b560 /* MPU only */
 #define CPU_ID_ARM1176JZS      0x410fb760
+#define CPU_ID_CORTEXA5R0      0x410fc050
 #define CPU_ID_CORTEXA8R1      0x411fc080
 #define CPU_ID_CORTEXA8R2      0x412fc080
 #define CPU_ID_CORTEXA8R3      0x413fc080
-#define CPU_ID_CORTEXA9R1      0x411fc090
+#define CPU_ID_CORTEXA9R2      0x411fc090
+#define CPU_ID_CORTEXA9R3      0x412fc090
+#define CPU_ID_CORTEXA9R4      0x413fc090
+#define CPU_ID_CORTEXA15R2     0x412fc0f0
+#define CPU_ID_CORTEXA15R3     0x413fc0f0
+#define        CPU_ID_CORTEX_P(n)      ((n & 0xff0ffff0) == 0x410fc000)
 #define CPU_ID_SA110           0x4401a100
 #define CPU_ID_SA1100          0x4401a110
 #define        CPU_ID_TI925T           0x54029250