[src/trunk]: src/sys/arch/arm Make auxiliary register naming consistent for t...

[skrll <skrll%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/7bdd661f68ea
branches:  trunk
changeset: 780437:7bdd661f68ea
user:      skrll <skrll%NetBSD.org@localhost>
date:      Mon Jul 23 15:51:48 2012 +0000

description:
Make auxiliary register naming consistent for the 1136.

diffstat:

 sys/arch/arm/arm/cpufunc.c    |   8 ++++----
 sys/arch/arm/include/armreg.h |  16 ++++++++--------
 2 files changed, 12 insertions(+), 12 deletions(-)

diffs (66 lines):

diff -r 624595b5a50b -r 7bdd661f68ea sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Mon Jul 23 15:10:17 2012 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Mon Jul 23 15:51:48 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.108 2012/07/21 12:19:15 skrll Exp $      */
+/*     $NetBSD: cpufunc.c,v 1.109 2012/07/23 15:51:48 skrll Exp $      */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.108 2012/07/21 12:19:15 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.109 2012/07/23 15:51:48 skrll Exp $");
 
 #include "opt_compat_netbsd.h"
 #include "opt_cpuoptions.h"
@@ -2993,8 +2993,8 @@
         */
        if ((cpuid & CPU_ID_CPU_MASK) == CPU_ID_ARM1136JS) { /* ARM1136JSr0pX */
                cpuctrl |= CPU_CONTROL_FI_ENABLE;
-               auxctrl = ARM11R0_AUXCTL_PFI;
-               auxctrl_wax = ~ARM11R0_AUXCTL_PFI;
+               auxctrl = ARM1136_AUXCTL_PFI;
+               auxctrl_wax = ~ARM1136_AUXCTL_PFI;
        }
 
        /*
diff -r 624595b5a50b -r 7bdd661f68ea sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h     Mon Jul 23 15:10:17 2012 +0000
+++ b/sys/arch/arm/include/armreg.h     Mon Jul 23 15:51:48 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armreg.h,v 1.55 2012/07/17 06:12:11 skrll Exp $        */
+/*     $NetBSD: armreg.h,v 1.56 2012/07/23 15:51:48 skrll Exp $        */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -317,13 +317,6 @@
 
 #define CPU_CONTROL_IDC_ENABLE CPU_CONTROL_DC_ENABLE
 
-/* ARM11r0 Auxiliary Control Register (CP15 register 1, opcode2 1) */
-#define ARM11R0_AUXCTL_PFI     0x80000000 /* PFI: partial FI mode. */
-                                          /* This is an undocumented flag
-                                           * used to work around a cache bug
-                                           * in r0 steppings. See errata
-                                           * 364296.
-                                           */
 /* ARM11x6 Auxiliary Control Register (CP15 register 1, opcode2 1) */
 #define        ARM11X6_AUXCTL_RS       0x00000001 /* return stack */
 #define        ARM11X6_AUXCTL_DB       0x00000002 /* dynamic branch prediction */
@@ -334,6 +327,13 @@
 #define        ARM11X6_AUXCTL_RV       0x00000040 /* block transfer cache disable */
 #define        ARM11X6_AUXCTL_CZ       0x00000080 /* restrict cache size */
 
+/* ARM1136 Auxiliary Control Register (CP15 register 1, opcode2 1) */
+#define ARM1136_AUXCTL_PFI     0x80000000 /* PFI: partial FI mode. */
+                                          /* This is an undocumented flag
+                                           * used to work around a cache bug
+                                           * in r0 steppings. See errata
+                                           * 364296.
+                                           */
 /* ARM1176 Auxiliary Control Register (CP15 register 1, opcode2 1) */   
 #define        ARM1176_AUXCTL_PHD      0x10000000 /* inst. prefetch halting disable */
 #define        ARM1176_AUXCTL_BFD      0x20000000 /* branch folding disable */