[src/trunk]: src/sys/arch/powerpc/include/booke Add ESDHC DCR definitions

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ed57d526aea4
branches:  trunk
changeset: 780472:ed57d526aea4
user:      matt <matt%NetBSD.org@localhost>
date:      Thu Jul 26 18:41:32 2012 +0000

description:
Add ESDHC DCR definitions

diffstat:

 sys/arch/powerpc/include/booke/e500reg.h |  13 ++++++++++++-
 1 files changed, 12 insertions(+), 1 deletions(-)

diffs (27 lines):

diff -r e7d75bb315c4 -r ed57d526aea4 sys/arch/powerpc/include/booke/e500reg.h
--- a/sys/arch/powerpc/include/booke/e500reg.h  Thu Jul 26 18:38:10 2012 +0000
+++ b/sys/arch/powerpc/include/booke/e500reg.h  Thu Jul 26 18:41:32 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: e500reg.h,v 1.13 2012/07/18 19:38:26 matt Exp $        */
+/*     $NetBSD: e500reg.h,v 1.14 2012/07/26 18:41:32 matt Exp $        */
 /*-
  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -344,6 +344,17 @@
 #define        ESDHC_BASE      0x2e000
 #define        ESDHC_SIZE      0x01000
 
+#ifdef ESDHC_PRIVATE
+
+#define        DCR             0x40c           /* DMA Control Register */
+
+#define        DCR_SNOOP       __PPCBIT(25)    /* DMA transactions are snooped */
+#define        DCR_RD_SAFE     __PPCBIT(29)    /* memory is read safe */
+#define        DCR_RD_PFE      __PPCBIT(30)    /* memory is prefetch safe */
+#define        DCR_RD_PF_SIZE  __PPCBIT(31)    /* prefetch size is 32-bytes */
+
+#endif
+
 #define        GLOBAL_BASE     0xe0000
 #define        GLOBAL_SIZE     0x01000