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[src/trunk]: src/sys Added support RICOH 5C316.
details: https://anonhg.NetBSD.org/src/rev/ad527e5f4f48
branches: trunk
changeset: 753676:ad527e5f4f48
user: nonaka <nonaka%NetBSD.org@localhost>
date: Tue Apr 06 15:29:19 2010 +0000
description:
Added support RICOH 5C316.
diffstat:
sys/arch/landisk/dev/rs5c313_landisk.c | 5 +-
sys/dev/ic/rs5c313.c | 37 +++++++++++++++-----
sys/dev/ic/rs5c313reg.h | 61 ++++++++++++++++++++++-----------
sys/dev/ic/rs5c313var.h | 10 +++++-
4 files changed, 80 insertions(+), 33 deletions(-)
diffs (240 lines):
diff -r 723d14786012 -r ad527e5f4f48 sys/arch/landisk/dev/rs5c313_landisk.c
--- a/sys/arch/landisk/dev/rs5c313_landisk.c Tue Apr 06 15:10:09 2010 +0000
+++ b/sys/arch/landisk/dev/rs5c313_landisk.c Tue Apr 06 15:29:19 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rs5c313_landisk.c,v 1.4 2008/05/04 19:43:05 martin Exp $ */
+/* $NetBSD: rs5c313_landisk.c,v 1.5 2010/04/06 15:29:19 nonaka Exp $ */
/*-
* Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rs5c313_landisk.c,v 1.4 2008/05/04 19:43:05 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rs5c313_landisk.c,v 1.5 2010/04/06 15:29:19 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -91,6 +91,7 @@
struct rs5c313_softc *sc = device_private(self);
sc->sc_dev = self;
+ sc->sc_model = MODEL_5C313;
sc->sc_ops = &rs5c313_landisk_ops;
rs5c313_attach(sc);
}
diff -r 723d14786012 -r ad527e5f4f48 sys/dev/ic/rs5c313.c
--- a/sys/dev/ic/rs5c313.c Tue Apr 06 15:10:09 2010 +0000
+++ b/sys/dev/ic/rs5c313.c Tue Apr 06 15:29:19 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rs5c313.c,v 1.8 2008/05/04 19:43:06 martin Exp $ */
+/* $NetBSD: rs5c313.c,v 1.9 2010/04/06 15:29:19 nonaka Exp $ */
/*-
* Copyright (c) 2006 The NetBSD Foundation, Inc.
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rs5c313.c,v 1.8 2008/05/04 19:43:06 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rs5c313.c,v 1.9 2010/04/06 15:29:19 nonaka Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -61,9 +61,28 @@
rs5c313_attach(struct rs5c313_softc *sc)
{
device_t self = sc->sc_dev;
+ const char *model;
+
+ switch (sc->sc_model) {
+ case MODEL_5C313:
+ model = "5C313";
+ sc->sc_ctrl[0] = CTRL_24H;
+ sc->sc_ctrl[1] = CTRL2_NTEST;
+ break;
+
+ case MODEL_5C316:
+ model = "5C316";
+ sc->sc_ctrl[0] = 0;
+ sc->sc_ctrl[1] = CTRL2_24H|CTRL2_NTEST;
+ break;
+
+ default:
+ aprint_error("unknown model (%d)\n", sc->sc_model);
+ return;
+ }
aprint_naive("\n");
- aprint_normal(": real time clock\n");
+ aprint_normal(": RICOH %s real time clock\n", model);
sc->sc_todr.cookie = sc;
sc->sc_todr.todr_gettime_ymdhms = rs5c313_todr_gettime_ymdhms;
@@ -99,7 +118,7 @@
aprint_error_dev(self, "time not valid\n");
rs5c313_write_reg(sc, RS5C313_TINT, 0);
- rs5c313_write_reg(sc, RS5C313_CTRL, (CTRL_BASE | CTRL_ADJ));
+ rs5c313_write_reg(sc, RS5C313_CTRL, (sc->sc_ctrl[0] | CTRL_ADJ));
for (retry = 1000; retry > 0; --retry) {
if (rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY)
@@ -107,13 +126,13 @@
else
break;
}
-
if (retry == 0) {
status = EIO;
goto done;
}
- rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE);
+ rs5c313_write_reg(sc, RS5C313_CTRL, sc->sc_ctrl[0]);
+ rs5c313_write_reg(sc, RS5C313_CTRL2, sc->sc_ctrl[1]);
done:
rtc_ce(sc, 0);
@@ -141,14 +160,13 @@
for (retry = 10; retry > 0; --retry) {
rtc_ce(sc, 1);
- rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE);
+ rs5c313_write_reg(sc, RS5C313_CTRL, sc->sc_ctrl[0]);
if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0)
break;
rtc_ce(sc, 0);
delay(1);
}
-
if (retry == 0) {
splx(s);
return EIO;
@@ -173,7 +191,6 @@
rtc_ce(sc, 0);
splx(s);
-
dt->dt_year = (dt->dt_year % 100) + 1900;
if (dt->dt_year < POSIX_BASE_YEAR) {
dt->dt_year += 100;
@@ -197,7 +214,7 @@
for (retry = 10; retry > 0; --retry) {
rtc_ce(sc, 1);
- rs5c313_write_reg(sc, RS5C313_CTRL, CTRL_BASE);
+ rs5c313_write_reg(sc, RS5C313_CTRL, sc->sc_ctrl[0]);
if ((rs5c313_read_reg(sc, RS5C313_CTRL) & CTRL_BSY) == 0)
break;
diff -r 723d14786012 -r ad527e5f4f48 sys/dev/ic/rs5c313reg.h
--- a/sys/dev/ic/rs5c313reg.h Tue Apr 06 15:10:09 2010 +0000
+++ b/sys/dev/ic/rs5c313reg.h Tue Apr 06 15:29:19 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rs5c313reg.h,v 1.2 2008/05/04 19:43:06 martin Exp $ */
+/* $NetBSD: rs5c313reg.h,v 1.3 2010/04/06 15:29:19 nonaka Exp $ */
/*-
* Copyright (c) 2005 The NetBSD Foundation, Inc.
@@ -30,24 +30,40 @@
#define _DEV_IC_RS5C313REG_H_
/*
- * RICOH RS5C313 Real Time Clock
+ * RICOH RS5C3[12]x Real Time Clock
*/
-#define RS5C313_SEC1 0
-#define RS5C313_SEC10 1
-#define RS5C313_MIN1 2
-#define RS5C313_MIN10 3
-#define RS5C313_HOUR1 4
-#define RS5C313_HOUR10 5
-#define RS5C313_WDAY 6
-#define RS5C313_TINT 7
-#define RS5C313_DAY1 8
-#define RS5C313_DAY10 9
-#define RS5C313_MON1 10
-#define RS5C313_MON10 11
-#define RS5C313_YEAR1 12
-#define RS5C313_YEAR10 13
-#define RS5C313_CTRL 14
-#define RS5C313_TEST 15
+ /* 5c313/5c314 don't have bank1 */
+#define RS5C313_SEC1 0 /* bank0 */
+#define RS5C313_SEC10 1 /* bank0 */
+#define RS5C313_MIN1 2 /* bank0 */
+#define RS5C313_MIN10 3 /* bank0 */
+#define RS5C313_HOUR1 4 /* bank0 */
+#define RS5C313_HOUR10 5 /* bank0 */
+#define RS5C313_WDAY 6 /* bank0 */
+#define RS5C313_TINT 7 /* bank0/1 (5c313/5c314/5c316/5c317) */
+#define RS5C313_SCRATCH 7 /* bank0/1 (5c321) */
+#define RS5C313_DAY1 8 /* bank0 */
+#define RS5C313_DAY10 9 /* bank0 */
+#define RS5C313_MON1 10 /* bank0 */
+#define RS5C313_MON10 11 /* bank0 */
+#define RS5C313_YEAR1 12 /* bank0 */
+#define RS5C313_YEAR10 13 /* bank0 */
+#define RS5C313_CTRL 14 /* bank0/1 */
+#define RS5C313_CTRL2 15 /* bank0/1 */
+
+/* Alarm register (5c316/5c317) */
+#define RS5C313_AWOD1 0 /* bank1 */
+#define RS5C313_AWOD2 1 /* bank1 */
+#define RS5C313_AMIN1 2 /* bank1 */
+#define RS5C313_AMIN10 3 /* bank1 */
+#define RS5C313_AHOUR1 4 /* bank1 */
+#define RS5C313_AHOUR10 5 /* bank1 */
+
+/* Timer register (5c317) */
+#define RS5C313_TMR 9 /* bank1 */
+
+/* 32kHz control register (5c317/5c321) */
+#define RS5C313_32KHZ 10 /* bank1 */
/* TINT register */
#define TINT_CT0 0x01
@@ -60,9 +76,14 @@
#define CTRL_ADJ 0x01 /* write */
#define CTRL_XSTP 0x02 /* read */
#define CTRL_WTEN 0x02 /* write */
-#define CTRL_24H 0x04 /* read/write */
+#define CTRL_24H 0x04 /* read/write (5c313/5c314) */
+#define CTRL_ALFG 0x04 /* read/write (5c316/5c317) */
#define CTRL_CTFG 0x08 /* read/write */
-#define CTRL_BASE CTRL_24H
+/* CTRL2 register */
+#define CTRL2_NTEST 0x01
+#define CTRL2_BANK 0x02 /* (5c316/5c317/5c321) */
+#define CTRL2_TMR 0x04 /* (5c317) */
+#define CTRL2_24H 0x08 /* (5c316/5c317/5c321) */
#endif /* _DEV_IC_RS5C313REG_H_ */
diff -r 723d14786012 -r ad527e5f4f48 sys/dev/ic/rs5c313var.h
--- a/sys/dev/ic/rs5c313var.h Tue Apr 06 15:10:09 2010 +0000
+++ b/sys/dev/ic/rs5c313var.h Tue Apr 06 15:29:19 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rs5c313var.h,v 1.2 2008/03/27 02:15:29 uwe Exp $ */
+/* $NetBSD: rs5c313var.h,v 1.3 2010/04/06 15:29:19 nonaka Exp $ */
/*
* Copyright (c) 2006 Valeriy E. Ushakov
@@ -43,6 +43,14 @@
struct rs5c313_ops *sc_ops;
int sc_valid; /* oscillation halt sensing on init */
+
+ enum {
+ MODEL_5C313 = 0,
+ MODEL_5C316,
+ MODEL_NUM
+ } sc_model;
+
+ int sc_ctrl[2]; /* ctrl registers */
};
struct rs5c313_ops {
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