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[src/trunk]: src/sys/arch/powerpc/include/booke Fix some TCR definitions.
details: https://anonhg.NetBSD.org/src/rev/b5022d345938
branches: trunk
changeset: 753560:b5022d345938
user: matt <matt%NetBSD.org@localhost>
date: Thu Apr 01 18:25:16 2010 +0000
description:
Fix some TCR definitions.
diffstat:
sys/arch/powerpc/include/booke/spr.h | 12 +++++++++---
1 files changed, 9 insertions(+), 3 deletions(-)
diffs (32 lines):
diff -r bfa07d97a734 -r b5022d345938 sys/arch/powerpc/include/booke/spr.h
--- a/sys/arch/powerpc/include/booke/spr.h Thu Apr 01 17:15:02 2010 +0000
+++ b/sys/arch/powerpc/include/booke/spr.h Thu Apr 01 18:25:16 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: spr.h,v 1.1 2010/03/09 22:39:32 matt Exp $ */
+/* $NetBSD: spr.h,v 1.2 2010/04/01 18:25:16 matt Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -143,14 +143,20 @@
#define TSR_FIS 0x04000000 /* Fixed-interval Interrupt Status (W1C) */
#define SPR_TCR 340 /* E... Timer Control Register */
#define TCR_WP 0xc0000000 /* Watchdog Period */
+#define TCR_WP_2_N(n) ((((64 - (n)) & 3) << 30) | (((64 - (n)) & 0x3c0) << 15))
+#define TCR_WP_2_64 0x00000000
+#define TCR_WP_2_1 0xc01e0000
#define TCR_WRC 0x30000000 /* Watchdog Timer Reset Control */
#define TCR_WIE 0x08000000 /* Watchdog Time Interrupt Enable */
#define TCR_DIE 0x04000000 /* Decremnter Interrupt Enable */
#define TCR_FP 0x03000000 /* Fixed-interval Timer Period */
+#define TCR_FP_2_N(n) ((((64 - (n)) & 3) << 24) | (((64 - (n)) & 0x3c0) << 11))
+#define TCR_FP_2_64 0x00000000
+#define TCR_FP_2_1 0x0301e000
#define TCR_FIE 0x00800000 /* Fixed-interval Interrupt Enable */
#define TCR_ARE 0x00400000 /* Auto-reload Enable */
-#define TCR_WPEXT 0x80000000 /* Watchdog Period Extension */
-#define TCR_FPEXT 0x80000000 /* Fixed-interval Period Extension */
+#define TCR_WPEXT 0x001e0000 /* Watchdog Period Extension */
+#define TCR_FPEXT 0x0001e000 /* Fixed-interval Period Extension */
#define SPR_IVOR0 400 /* E... Critical input interrupt offset */
#define SPR_IVOR1 401 /* E... Machine check interrupt offset */
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