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[src/trunk]: src/sys/arch Add P1025 support to the PCI truth tables.
details: https://anonhg.NetBSD.org/src/rev/fc440983f658
branches: trunk
changeset: 780269:fc440983f658
user: matt <matt%NetBSD.org@localhost>
date: Wed Jul 18 19:38:26 2012 +0000
description:
Add P1025 support to the PCI truth tables.
P1025 only has two PCIe ports, not 3.
diffstat:
sys/arch/evbppc/mpc85xx/machdep.c | 18 ++++++++++--------
sys/arch/powerpc/booke/pci/pq3pci.c | 18 ++++++++++++++++--
sys/arch/powerpc/include/booke/e500reg.h | 6 +++++-
3 files changed, 31 insertions(+), 11 deletions(-)
diffs (112 lines):
diff -r f491a62cfb7f -r fc440983f658 sys/arch/evbppc/mpc85xx/machdep.c
--- a/sys/arch/evbppc/mpc85xx/machdep.c Wed Jul 18 19:01:50 2012 +0000
+++ b/sys/arch/evbppc/mpc85xx/machdep.c Wed Jul 18 19:38:26 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: machdep.c,v 1.26 2012/07/17 01:36:12 matt Exp $ */
+/* $NetBSD: machdep.c,v 1.27 2012/07/18 19:38:26 matt Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -364,11 +364,12 @@
1 + ilog2(DEVDISR_PCIE2),
{ SVR_MPC8572v1 >> 16, SVR_P2020v2 >> 16,
SVR_P1025v1 >> 16 } },
+#endif
+#if defined(MPC8572) || defined(P2020)
{ "pcie", PCIE3_MPC8572_BASE, PCI_SIZE, 3,
1, { ISOURCE_PCIEX3_MPC8572 },
1 + ilog2(DEVDISR_PCIE3),
- { SVR_MPC8572v1 >> 16, SVR_P2020v2 >> 16,
- SVR_P1025v1 >> 16 } },
+ { SVR_MPC8572v1 >> 16, SVR_P2020v2 >> 16, } },
#endif
#if defined(MPC8536) || defined(P1025) || defined(P2020)
{ "ehci", USB1_BASE, USB_SIZE, 1,
@@ -1422,15 +1423,16 @@
case SVR_MPC8544v1 >> 16:
case SVR_MPC8572v1 >> 16:
case SVR_P1016v1 >> 16:
- case SVR_P1025v1 >> 16:
case SVR_P2010v2 >> 16:
case SVR_P2020v2 >> 16:
+ mpc85xx_pci_setup("pcie3-interrupt-map", 0x001800, IST_LEVEL,
+ 8, 9, 10, 11);
+ /* FALLTHROUGH */
+ case SVR_P1025v1 >> 16:
+ mpc85xx_pci_setup("pcie2-interrupt-map", 0x001800, IST_LEVEL,
+ 4, 5, 6, 7);
mpc85xx_pci_setup("pcie1-interrupt-map", 0x001800, IST_LEVEL,
0, 1, 2, 3);
- mpc85xx_pci_setup("pcie2-interrupt-map", 0x001800, IST_LEVEL,
- 4, 5, 6, 7);
- mpc85xx_pci_setup("pcie3-interrupt-map", 0x001800, IST_LEVEL,
- 8, 9, 10, 11);
break;
#endif
}
diff -r f491a62cfb7f -r fc440983f658 sys/arch/powerpc/booke/pci/pq3pci.c
--- a/sys/arch/powerpc/booke/pci/pq3pci.c Wed Jul 18 19:01:50 2012 +0000
+++ b/sys/arch/powerpc/booke/pci/pq3pci.c Wed Jul 18 19:38:26 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pq3pci.c,v 1.12 2012/01/27 18:52:59 para Exp $ */
+/* $NetBSD: pq3pci.c,v 1.13 2012/07/18 19:38:26 matt Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -44,7 +44,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pq3pci.c,v 1.12 2012/01/27 18:52:59 para Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pq3pci.c,v 1.13 2012/07/18 19:38:26 matt Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -87,6 +87,11 @@
__SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result), \
TRUTH_ENCODE(SVR_P2010v2, inst, PORDEVSR_##field, \
__SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result)
+#define PORDEVSR_P1025_TRUTH_ENCODE(inst, field, value, result) \
+ TRUTH_ENCODE(SVR_P1025v1, inst, PORDEVSR_##field, \
+ __SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result), \
+ TRUTH_ENCODE(SVR_P1016v1, inst, PORDEVSR_##field, \
+ __SHIFTIN(field##_##P20x0##_##value, PORDEVSR_##field), result)
#define PORDEVSR_TRUTH_ENCODE(svr, inst, field, value, result) \
TRUTH_ENCODE(svr, inst, PORDEVSR_##field, \
@@ -157,6 +162,15 @@
PORDEVSR_P20x0_TRUTH_ENCODE(3, IOSEL, PCIE12_X1_3_X2, 2),
PORDEVSR_P20x0_TRUTH_ENCODE(3, IOSEL, PCIE13_X2, 2),
#endif
+
+#ifdef P1025
+ PORDEVSR_P1025_TRUTH_ENCODE(1, IOSEL, PCIE1_X1, 1),
+ PORDEVSR_P1025_TRUTH_ENCODE(1, IOSEL, PCIE1_X4, 4),
+ PORDEVSR_P1025_TRUTH_ENCODE(1, IOSEL, PCIE12_X1_SGMII23, 1),
+ PORDEVSR_P1025_TRUTH_ENCODE(1, IOSEL, PCIE1_X2_SGMII23, 2),
+
+ PORDEVSR_P1025_TRUTH_ENCODE(2, IOSEL, PCIE12_X1_SGMII23, 1),
+#endif
};
static const struct e500_truthtab pq3pci_pci_pcix[] = {
diff -r f491a62cfb7f -r fc440983f658 sys/arch/powerpc/include/booke/e500reg.h
--- a/sys/arch/powerpc/include/booke/e500reg.h Wed Jul 18 19:01:50 2012 +0000
+++ b/sys/arch/powerpc/include/booke/e500reg.h Wed Jul 18 19:38:26 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: e500reg.h,v 1.12 2012/07/17 01:36:13 matt Exp $ */
+/* $NetBSD: e500reg.h,v 1.13 2012/07/18 19:38:26 matt Exp $ */
/*-
* Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -418,6 +418,10 @@
#define IOSEL_P20x0_PCIE1_X1_SRIO2500_1X 13
#define IOSEL_P20x0_PCIE12_X1_SGMII23 14
#define IOSEL_P20x0_PCIE1_X2_SGMII23 15
+#define IOSEL_P1025_PCIE1_X1 0 /* same at P20x10 */
+#define IOSEL_P1025_PCIE1_X4 6 /* same at P20x10 */
+#define IOSEL_P1025_PCIE12_X1_SGMII23 14 /* same at P20x10 */
+#define IOSEL_P1025_PCIE1_X2_SGMII23 15 /* same at P20x10 */
#define PORDEVSR_PCI2_ARB __PPCBIT(13)
#define PORDEVSR_PCI1_ARB __PPCBIT(14)
#define PORDEVSR_PCI32 __PPCBIT(15)
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