[src/trunk]: src/sys/dev/sdmmc Support deciphering SDHCv3 clock rates.

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/6ea6e8723bf5
branches:  trunk
changeset: 781291:6ea6e8723bf5
user:      matt <matt%NetBSD.org@localhost>
date:      Fri Aug 31 01:44:20 2012 +0000

description:
Support deciphering SDHCv3 clock rates.

diffstat:

 sys/dev/sdmmc/sdhc.c    |  10 +++++++---
 sys/dev/sdmmc/sdhcreg.h |   5 ++++-
 2 files changed, 11 insertions(+), 4 deletions(-)

diffs (57 lines):

diff -r a5c1b42b97b7 -r 6ea6e8723bf5 sys/dev/sdmmc/sdhc.c
--- a/sys/dev/sdmmc/sdhc.c      Fri Aug 31 01:23:49 2012 +0000
+++ b/sys/dev/sdmmc/sdhc.c      Fri Aug 31 01:44:20 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: sdhc.c,v 1.29 2012/07/30 00:56:01 matt Exp $   */
+/*     $NetBSD: sdhc.c,v 1.30 2012/08/31 01:44:20 matt Exp $   */
 /*     $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $        */
 
 /*
@@ -23,7 +23,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.29 2012/07/30 00:56:01 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.30 2012/08/31 01:44:20 matt Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_sdmmc.h"
@@ -311,7 +311,11 @@
        /*
         * Determine the base clock frequency. (2.2.24)
         */
-       hp->clkbase = SDHC_BASE_FREQ_KHZ(caps);
+       if (hp->specver == SDHC_SPEC_VERS_300) {
+               hp->clkbase = SDHC_BASE_V3_FREQ_KHZ(caps);
+       } else {
+               hp->clkbase = SDHC_BASE_FREQ_KHZ(caps);
+       }
        if (hp->clkbase == 0) {
                if (sc->sc_clkbase == 0) {
                        /* The attachment driver must tell us. */
diff -r a5c1b42b97b7 -r 6ea6e8723bf5 sys/dev/sdmmc/sdhcreg.h
--- a/sys/dev/sdmmc/sdhcreg.h   Fri Aug 31 01:23:49 2012 +0000
+++ b/sys/dev/sdmmc/sdhcreg.h   Fri Aug 31 01:44:20 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: sdhcreg.h,v 1.8 2012/07/20 02:04:13 matt Exp $ */
+/*     $NetBSD: sdhcreg.h,v 1.9 2012/08/31 01:45:21 matt Exp $ */
 /*     $OpenBSD: sdhcreg.h,v 1.4 2006/07/30 17:20:40 fgsch Exp $       */
 
 /*
@@ -151,6 +151,7 @@
 #define  SDHC_MAX_BLK_LEN_MASK         0x3
 #define  SDHC_BASE_FREQ_SHIFT          8
 #define  SDHC_BASE_FREQ_MASK           0x3f
+#define  SDHC_BASE_V3_FREQ_MASK                0xff
 #define  SDHC_TIMEOUT_FREQ_UNIT                (1<<7)  /* 0=KHz, 1=MHz */
 #define  SDHC_TIMEOUT_FREQ_SHIFT       0
 #define  SDHC_TIMEOUT_FREQ_MASK                0x1f
@@ -180,6 +181,8 @@
 #define        SDHC_SPEC_VERS_300              0x02
 
 /* SDHC_CAPABILITIES decoding */
+#define SDHC_BASE_V3_FREQ_KHZ(cap)                                     \
+       ((((cap) >> SDHC_BASE_FREQ_SHIFT) & SDHC_BASE_V3_FREQ_MASK) * 1000)
 #define SDHC_BASE_FREQ_KHZ(cap)                                                \
        ((((cap) >> SDHC_BASE_FREQ_SHIFT) & SDHC_BASE_FREQ_MASK) * 1000)
 #define SDHC_TIMEOUT_FREQ(cap)                                         \