[src/trunk]: src/sys/arch/arm/include/arm32 Alas, Cortex-A8 can't TLB walk ou...

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/602ea0839683
branches:  trunk
changeset: 781438:602ea0839683
user:      matt <matt%NetBSD.org@localhost>
date:      Thu Sep 06 04:42:39 2012 +0000

description:
Alas, Cortex-A8 can't TLB walk out of their caches so they need to sync each PTE.

diffstat:

 sys/arch/arm/include/arm32/pmap.h |  11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletions(-)

diffs (26 lines):

diff -r 178aa0dedc45 -r 602ea0839683 sys/arch/arm/include/arm32/pmap.h
--- a/sys/arch/arm/include/arm32/pmap.h Thu Sep 06 03:45:02 2012 +0000
+++ b/sys/arch/arm/include/arm32/pmap.h Thu Sep 06 04:42:39 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pmap.h,v 1.108 2012/09/06 02:07:25 matt Exp $  */
+/*     $NetBSD: pmap.h,v 1.109 2012/09/06 04:42:39 matt Exp $  */
 
 /*
  * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
@@ -405,7 +405,16 @@
 #if (ARM_MMU_SA1 + ARM_MMU_V6 + ARM_MMU_V7 != 0) && (ARM_NMMUS == 1) 
 #define        PMAP_INCLUDE_PTE_SYNC
 #if (ARM_MMU_V7 > 0)
+#if defined(CPU_CORTEXA8)
+#if defined(CPU_CORTEXA5) || defined(CPU_CORTEXA7) || defined(CPU_CORTEXA9) \
+    || defined(CPU_CORTEXA15)
+#define        PMAP_NEEDS_PTE_SYNC     CPU_ID_IS_CORTEX_A8(curcpu()->ci_arm_cpuid)
+#else
+#define        PMAP_NEEDS_PTE_SYNC     1
+#endif
+#else
 #define        PMAP_NEEDS_PTE_SYNC     0
+#endif
 #else
 #define        PMAP_NEEDS_PTE_SYNC     1
 #endif