[src/trunk]: src/sys/arch/arm Add armv7_drain_writebuf (which is just a dsb).

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/4d691c21a7d5
branches:  trunk
changeset: 782168:4d691c21a7d5
user:      matt <matt%NetBSD.org@localhost>
date:      Fri Oct 19 13:47:03 2012 +0000

description:
Add armv7_drain_writebuf (which is just a dsb).

diffstat:

 sys/arch/arm/arm/cpufunc.c           |  6 +++---
 sys/arch/arm/arm/cpufunc_asm_armv7.S |  9 ++++++++-
 sys/arch/arm/include/cpufunc.h       |  3 ++-
 3 files changed, 13 insertions(+), 5 deletions(-)

diffs (66 lines):

diff -r 3172616e720a -r 4d691c21a7d5 sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Fri Oct 19 13:46:07 2012 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Fri Oct 19 13:47:03 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.116 2012/09/11 17:51:38 matt Exp $       */
+/*     $NetBSD: cpufunc.c,v 1.117 2012/10/19 13:47:03 matt Exp $       */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.116 2012/09/11 17:51:38 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.117 2012/10/19 13:47:03 matt Exp $");
 
 #include "opt_compat_netbsd.h"
 #include "opt_cpuoptions.h"
@@ -1311,7 +1311,7 @@
        /* Other functions */
 
        .cf_flush_prefetchbuf   = cpufunc_nullop,
-       .cf_drain_writebuf      = arm11_drain_writebuf,
+       .cf_drain_writebuf      = armv7_drain_writebuf,
        .cf_flush_brnchtgt_C    = cpufunc_nullop,
        .cf_flush_brnchtgt_E    = (void *)cpufunc_nullop,
 
diff -r 3172616e720a -r 4d691c21a7d5 sys/arch/arm/arm/cpufunc_asm_armv7.S
--- a/sys/arch/arm/arm/cpufunc_asm_armv7.S      Fri Oct 19 13:46:07 2012 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_armv7.S      Fri Oct 19 13:47:03 2012 +0000
@@ -74,7 +74,7 @@
 END(armv7_tlb_flushID_SE)
 
 
-ENTRY(armv7_setttb)
+ENTRY_NP(armv7_setttb)
        mrc     p15, 0, r2, c0, c0, 5   @ get MPIDR
        cmp     r2, #0
        orrlt   r0, #0x5b               @ MP, cachable (Normal WB)
@@ -91,6 +91,13 @@
        bx      lr
 END(armv7_setttb)
 
+/* Other functions. */
+
+ENTRY_NP(armv7_drain_writebuf)
+       dsb                             @ data synchronization barrier
+       RET
+END(armv7_drain_writebuf)
+
 /* Cache operations. */
 
 /* LINTSTUB: void armv7_icache_sync_range(vaddr_t, vsize_t); */
diff -r 3172616e720a -r 4d691c21a7d5 sys/arch/arm/include/cpufunc.h
--- a/sys/arch/arm/include/cpufunc.h    Fri Oct 19 13:46:07 2012 +0000
+++ b/sys/arch/arm/include/cpufunc.h    Fri Oct 19 13:47:03 2012 +0000
@@ -474,7 +474,8 @@
 void   armv7_cpu_sleep(int);
 void   armv7_context_switch(u_int);
 void   armv7_tlb_flushID_SE(u_int);
-void   armv7_setup             (char *string);
+void   armv7_drain_writebuf(void);
+void   armv7_setup(char *string);
 #endif