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[src/netbsd-6]: src/sys/arch/powerpc Revert ticket 1310 (second try):
details: https://anonhg.NetBSD.org/src/rev/fb24af498c98
branches: netbsd-6
changeset: 777032:fb24af498c98
user: bouyer <bouyer%NetBSD.org@localhost>
date: Thu Nov 19 08:50:05 2015 +0000
description:
Revert ticket 1310 (second try):
> sys/arch/powerpc/include/psl.h 1.20
> sys/arch/powerpc/include/userret.h 1.29, 1.30
> sys/arch/powerpc/oea/altivec.c 1.30
> sys/arch/powerpc/oea/oea_machdep.c 1.72
> sys/arch/powerpc/powerpc/fpu.c 1.36
>
> powerpc PCU fixes
because it breaks the build:
http://releng.netbsd.org/builds/netbsd-6/201511152000Z/
diffstat:
sys/arch/powerpc/include/psl.h | 7 +-
sys/arch/powerpc/include/userret.h | 21 +---
sys/arch/powerpc/oea/altivec.c | 54 ++++++-------
sys/arch/powerpc/oea/oea_machdep.c | 140 ++++++------------------------------
sys/arch/powerpc/powerpc/fpu.c | 36 ++++----
5 files changed, 79 insertions(+), 179 deletions(-)
diffs (truncated from 573 to 300 lines):
diff -r ae89af5f3388 -r fb24af498c98 sys/arch/powerpc/include/psl.h
--- a/sys/arch/powerpc/include/psl.h Wed Nov 18 06:52:21 2015 +0000
+++ b/sys/arch/powerpc/include/psl.h Thu Nov 19 08:50:05 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: psl.h,v 1.18.8.2 2015/11/16 09:00:01 bouyer Exp $ */
+/* $NetBSD: psl.h,v 1.18.8.3 2015/11/19 08:50:05 bouyer Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -102,8 +102,7 @@
#include "opt_ppcarch.h"
#endif /* _KERNEL_OPT */
-#if defined(PPC_OEA) || defined (PPC_OEA64_BRIDGE) || defined (PPC_OEA64) \
- || defined(_MODULE)
+#if defined(PPC_OEA) || defined (PPC_OEA64_BRIDGE) || defined(_MODULE)
extern register_t cpu_psluserset, cpu_pslusermod, cpu_pslusermask;
#define PSL_USERSET cpu_psluserset
@@ -112,7 +111,7 @@
#elif defined(PPC_BOOKE)
#define PSL_USERSET (PSL_EE | PSL_PR | PSL_IS | PSL_DS | PSL_ME | PSL_CE | PSL_DE)
#define PSL_USERMASK (PSL_SPV | PSL_CE | 0xFFFF)
-#define PSL_USERMOD (0)
+#define PSL_USERMOD (PSL_SPV)
#else /* PPC_IBM4XX */
#ifdef PPC_IBM403
#define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR | PSL_ME)
diff -r ae89af5f3388 -r fb24af498c98 sys/arch/powerpc/include/userret.h
--- a/sys/arch/powerpc/include/userret.h Wed Nov 18 06:52:21 2015 +0000
+++ b/sys/arch/powerpc/include/userret.h Thu Nov 19 08:50:05 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: userret.h,v 1.22.8.3 2015/11/16 09:00:01 bouyer Exp $ */
+/* $NetBSD: userret.h,v 1.22.8.4 2015/11/19 08:50:05 bouyer Exp $ */
/*
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -58,16 +58,7 @@
/* Invoke MI userret code */
mi_userret(l);
- KASSERTMSG((tf->tf_srr1 & PSL_PR) != 0,
- "tf=%p: srr1 (%#lx): PSL_PR isn't set!",
- tf, tf->tf_srr1);
- KASSERTMSG((tf->tf_srr1 & PSL_FP) == 0
- || l->l_cpu->ci_data.cpu_pcu_curlwp[PCU_FPU] == l,
- "tf=%p: srr1 (%#lx): PSL_FP set but FPU curlwp %p is not curlwp %p!",
- tf, tf->tf_srr1, l->l_cpu->ci_data.cpu_pcu_curlwp[PCU_FPU], l);
-
- /* clear SRR1 status bits */
- tf->tf_srr1 &= (PSL_USERSRR1|PSL_FP|PSL_VEC);
+ tf->tf_srr1 &= PSL_USERSRR1; /* clear SRR1 status bits */
#ifdef ALTIVEC
/*
@@ -79,12 +70,12 @@
#endif
#ifdef PPC_BOOKE
/*
- * BookE doesn't have PSL_SE but it does have a debug instruction
- * completion exception but it needs PSL_DE to fire. Instead we
- * use IAC1/IAC2 to match the next PC.
+ * BookE doesn't PSL_SE but it does have a debug instruction completion
+ * exception but it needs PSL_DE to fire. Since we don't want it to
+ * happen in the kernel, we must disable PSL_DE and let it get
+ * restored by rfi/rfci.
*/
if (__predict_false(tf->tf_srr1 & PSL_SE)) {
- tf->tf_srr1 &= ~PSL_SE;
extern void booke_sstep(struct trapframe *); /* ugly */
booke_sstep(tf);
}
diff -r ae89af5f3388 -r fb24af498c98 sys/arch/powerpc/oea/altivec.c
--- a/sys/arch/powerpc/oea/altivec.c Wed Nov 18 06:52:21 2015 +0000
+++ b/sys/arch/powerpc/oea/altivec.c Thu Nov 19 08:50:05 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: altivec.c,v 1.25.8.2 2015/11/16 09:00:01 bouyer Exp $ */
+/* $NetBSD: altivec.c,v 1.25.8.3 2015/11/19 08:50:05 bouyer Exp $ */
/*
* Copyright (C) 1996 Wolfgang Solfrank.
@@ -32,7 +32,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: altivec.c,v 1.25.8.2 2015/11/16 09:00:01 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: altivec.c,v 1.25.8.3 2015/11/19 08:50:05 bouyer Exp $");
#include "opt_multiprocessor.h"
@@ -49,7 +49,7 @@
#include <powerpc/oea/spr.h>
#include <powerpc/psl.h>
-static void vec_state_load(lwp_t *, u_int);
+static void vec_state_load(lwp_t *, bool);
static void vec_state_save(lwp_t *);
static void vec_state_release(lwp_t *);
@@ -63,45 +63,37 @@
bool
vec_used_p(lwp_t *l)
{
- return pcu_valid_p(&vec_ops);
+ return (l->l_md.md_flags & MDLWP_USEDVEC) != 0;
}
void
vec_mark_used(lwp_t *l)
{
- return pcu_discard(&vec_ops, true);
+ l->l_md.md_flags |= MDLWP_USEDVEC;
}
void
-vec_state_load(lwp_t *l, u_int flags)
+vec_state_load(lwp_t *l, bool used)
{
struct pcb * const pcb = lwp_getpcb(l);
- if ((flags & PCU_VALID) == 0) {
+ if (__predict_false(!vec_used_p(l))) {
memset(&pcb->pcb_vr, 0, sizeof(pcb->pcb_vr));
vec_mark_used(l);
}
- if ((flags & PCU_REENABLE) == 0) {
- /*
- * Enable AltiVec temporarily (and disable interrupts).
- */
- const register_t msr = mfmsr();
- mtmsr((msr & ~PSL_EE) | PSL_VEC);
- __asm volatile ("isync");
+ /*
+ * Enable AltiVec temporarily (and disable interrupts).
+ */
+ const register_t msr = mfmsr();
+ mtmsr((msr & ~PSL_EE) | PSL_VEC);
+ __asm volatile ("isync");
- /*
- * Load the vector unit from vreg which is best done in
- * assembly.
- */
- vec_load_from_vreg(&pcb->pcb_vr);
-
- /*
- * Restore MSR (turn off AltiVec)
- */
- mtmsr(msr);
- __asm volatile ("isync");
- }
+ /*
+ * Load the vector unit from vreg which is best done in
+ * assembly.
+ */
+ vec_load_from_vreg(&pcb->pcb_vr);
/*
* VRSAVE will be restored when trap frame returns
@@ -109,9 +101,15 @@
l->l_md.md_utf->tf_vrsave = pcb->pcb_vr.vrsave;
/*
+ * Restore MSR (turn off AltiVec)
+ */
+ mtmsr(msr);
+ __asm volatile ("isync");
+
+ /*
* Mark vector registers as modified.
*/
- l->l_md.md_flags |= PSL_VEC;
+ l->l_md.md_flags |= MDLWP_USEDVEC|PSL_VEC;
l->l_md.md_utf->tf_srr1 |= PSL_VEC;
}
@@ -166,7 +164,7 @@
KASSERT(l == curlwp);
/* we don't need to save the state, just drop it */
- pcu_discard(&vec_ops, true);
+ pcu_discard(&vec_ops);
memcpy(pcb->pcb_vr.vreg, &mcp->__vrf.__vrs, sizeof (pcb->pcb_vr.vreg));
pcb->pcb_vr.vscr = mcp->__vrf.__vscr;
pcb->pcb_vr.vrsave = mcp->__vrf.__vrsave;
diff -r ae89af5f3388 -r fb24af498c98 sys/arch/powerpc/oea/oea_machdep.c
--- a/sys/arch/powerpc/oea/oea_machdep.c Wed Nov 18 06:52:21 2015 +0000
+++ b/sys/arch/powerpc/oea/oea_machdep.c Thu Nov 19 08:50:05 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: oea_machdep.c,v 1.63.2.2 2015/11/16 09:00:01 bouyer Exp $ */
+/* $NetBSD: oea_machdep.c,v 1.63.2.3 2015/11/19 08:50:05 bouyer Exp $ */
/*
* Copyright (C) 2002 Matt Thomas
@@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.63.2.2 2015/11/16 09:00:01 bouyer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: oea_machdep.c,v 1.63.2.3 2015/11/19 08:50:05 bouyer Exp $");
#include "opt_ppcarch.h"
#include "opt_compat_netbsd.h"
@@ -56,7 +56,6 @@
#include <sys/syscallargs.h>
#include <sys/syslog.h>
#include <sys/systm.h>
-#include <sys/cpu.h>
#include <uvm/uvm_extern.h>
@@ -148,14 +147,6 @@
#endif
KASSERT(mfspr(SPR_SPRG0) == (uintptr_t)ci);
-#if defined (PPC_OEA64_BRIDGE) && defined (PPC_OEA)
- if (oeacpufeat & OEACPU_64_BRIDGE)
- pmap_setup64bridge();
- else
- pmap_setup32();
-#endif
-
-
cpuvers = mfpvr() >> 16;
/*
@@ -289,8 +280,8 @@
* Install a branch absolute to trap0 to force a panic.
*/
if ((uintptr_t)trap0 < 0x2000000) {
- *(volatile uint32_t *) 0 = 0x7c6802a6;
- *(volatile uint32_t *) 4 = 0x48000002 | (uintptr_t) trap0;
+ *(uint32_t *) 0 = 0x7c6802a6;
+ *(uint32_t *) 4 = 0x48000002 | (uintptr_t) trap0;
}
/*
@@ -307,16 +298,6 @@
#define B 0x48000000
#define TLBSYNC 0x7c00046c
#define SYNC 0x7c0004ac
-#ifdef PPC_OEA64_BRIDGE
-#define MFMSR_MASK 0xfc1fffff
-#define MFMSR 0x7c0000a6
-#define MTMSRD_MASK 0xfc1effff
-#define MTMSRD 0x7c000164
-#define RLDICL_MASK 0xfc00001c
-#define RLDICL 0x78000000
-#define RFID 0x4c000024
-#define RFI 0x4c000064
-#endif
#ifdef ALTIVEC
#define MFSPR_VRSAVE 0x7c0042a6
@@ -339,7 +320,9 @@
if (scratch & PSL_VEC) {
cpu_altivec = 1;
} else {
- for (int *ip = trapstart; ip < trapend; ip++) {
+ int *ip = trapstart;
+
+ for (; ip < trapend; ip++) {
if ((ip[0] & MxSPR_MASK) == MFSPR_VRSAVE) {
ip[0] = NOP; /* mfspr */
ip[1] = NOP; /* stw */
@@ -360,7 +343,9 @@
* sequences where we zap/restore BAT registers on kernel exit/entry.
*/
if (cpuvers != MPC601) {
- for (int *ip = trapstart; ip < trapend; ip++) {
+ int *ip = trapstart;
+
+ for (; ip < trapend; ip++) {
if ((ip[0] & MxSPR_MASK) == MFSPR_MQ) {
ip[0] = NOP; /* mfspr */
ip[1] = NOP; /* stw */
@@ -376,39 +361,6 @@
}
}
-#ifdef PPC_OEA64_BRIDGE
- if ((oeacpufeat & OEACPU_64_BRIDGE) == 0) {
- for (int *ip = (int *)exc_base;
- (uintptr_t)ip <= exc_base + EXC_LAST;
- ip++) {
- if ((ip[0] & MFMSR_MASK) == MFMSR
- && (ip[1] & RLDICL_MASK) == RLDICL
- && (ip[2] & MTMSRD_MASK) == MTMSRD) {
- *ip++ = NOP;
- *ip++ = NOP;
- ip[0] = NOP;
- } else if (*ip == RFID) {
- *ip = RFI;
- }
- }
-
- /*
- * Now replace each rfid instruction with a rfi instruction.
- */
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