[src/trunk]: src/sys/dev/pci Add a workaround for 48-bit LBA DMA access bug o...

[nakayama <nakayama%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/502ac8271e62
branches:  trunk
changeset: 758360:502ac8271e62
user:      nakayama <nakayama%NetBSD.org@localhost>
date:      Wed Nov 03 11:46:30 2010 +0000

description:
Add a workaround for 48-bit LBA DMA access bug on M5229 rev. <= 0xc4.
- use DMA in 28-bit LBA addressing.
- use PIO in 48-bit LBA addressing.

Idea and message are from FreeBSD, and tested on M5229 rev. 0xc3 in
my Sun Netra X1 with 160GB drive.

diffstat:

 sys/dev/pci/aceride.c |  23 +++++++++++++++++++++--
 1 files changed, 21 insertions(+), 2 deletions(-)

diffs (55 lines):

diff -r 6f92d5c4a9f3 -r 502ac8271e62 sys/dev/pci/aceride.c
--- a/sys/dev/pci/aceride.c     Wed Nov 03 08:27:27 2010 +0000
+++ b/sys/dev/pci/aceride.c     Wed Nov 03 11:46:30 2010 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: aceride.c,v 1.27 2010/05/08 19:49:02 nakayama Exp $    */
+/*     $NetBSD: aceride.c,v 1.28 2010/11/03 11:46:30 nakayama Exp $    */
 
 /*
  * Copyright (c) 1999, 2000, 2001 Manuel Bouyer.
@@ -25,7 +25,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: aceride.c,v 1.27 2010/05/08 19:49:02 nakayama Exp $");
+__KERNEL_RCSID(0, "$NetBSD: aceride.c,v 1.28 2010/11/03 11:46:30 nakayama Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -41,6 +41,7 @@
 static void acer_chip_map(struct pciide_softc*, struct pci_attach_args*);
 static void acer_setup_channel(struct ata_channel*);
 static int  acer_pci_intr(void *);
+static int  acer_dma_init(void *, int, int, void *, size_t, int);
 
 static int  aceride_match(device_t, cfdata_t, void *);
 static void aceride_attach(device_t, device_t, void *);
@@ -139,6 +140,12 @@
                                sc->sc_wdcdev.sc_atac.atac_udma_cap = 2;
                }
                sc->sc_wdcdev.irqack = pciide_irqack;
+               if (rev <= 0xc4) {
+                       sc->sc_wdcdev.dma_init = acer_dma_init;
+                       aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
+                        "using PIO transfers above 137GB as workaround for "
+                        "48bit DMA access bug, expect reduced performance\n");
+               }
        }
 
        sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
@@ -370,3 +377,15 @@
        }
        return rv;
 }
+
+static int
+acer_dma_init(void *v, int channel, int drive, void *databuf,
+    size_t datalen, int flags)
+{
+
+       /* use PIO for LBA48 transfer */
+       if (flags & WDC_DMA_LBA48)
+               return EINVAL;
+
+       return pciide_dma_init(v, channel, drive, databuf, datalen, flags);
+}