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[src/trunk]: src add info on L2 TLBs and 1GB pages.
details: https://anonhg.NetBSD.org/src/rev/f38da6473704
branches: trunk
changeset: 771862:f38da6473704
user: chs <chs%NetBSD.org@localhost>
date: Sun Dec 04 17:00:10 2011 +0000
description:
add info on L2 TLBs and 1GB pages.
diffstat:
sys/arch/x86/include/cacheinfo.h | 8 +-
usr.sbin/cpuctl/arch/i386.c | 146 +++++++++++++++++++++++++++++++++++++-
2 files changed, 146 insertions(+), 8 deletions(-)
diffs (236 lines):
diff -r 2a9d20da61da -r f38da6473704 sys/arch/x86/include/cacheinfo.h
--- a/sys/arch/x86/include/cacheinfo.h Sun Dec 04 16:53:08 2011 +0000
+++ b/sys/arch/x86/include/cacheinfo.h Sun Dec 04 17:00:10 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cacheinfo.h,v 1.12 2009/05/13 23:26:38 pgoyette Exp $ */
+/* $NetBSD: cacheinfo.h,v 1.13 2011/12/04 17:00:10 chs Exp $ */
#ifndef _X86_CACHEINFO_H_
#define _X86_CACHEINFO_H_
@@ -26,8 +26,12 @@
#define CAI_L1_1GBDTLB 9 /* L1 1GB Page data TLB */
#define CAI_L2_1GBITLB 10 /* L2 1GB Page instruction TLB */
#define CAI_L2_1GBDTLB 11 /* L2 1GB Page data TLB */
+#define CAI_L2_ITLB 12 /* L2 Instruction TLB (4K pages) */
+#define CAI_L2_ITLB2 13 /* L2 Instruction TLB (2/4M pages) */
+#define CAI_L2_DTLB 14 /* L2 Data TLB (4K pages) */
+#define CAI_L2_DTLB2 15 /* L2 Data TLB (2/4M pages) */
-#define CAI_COUNT 12
+#define CAI_COUNT 16
/*
* AMD Cache Info:
diff -r 2a9d20da61da -r f38da6473704 usr.sbin/cpuctl/arch/i386.c
--- a/usr.sbin/cpuctl/arch/i386.c Sun Dec 04 16:53:08 2011 +0000
+++ b/usr.sbin/cpuctl/arch/i386.c Sun Dec 04 17:00:10 2011 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: i386.c,v 1.25 2011/05/03 09:06:22 jruoho Exp $ */
+/* $NetBSD: i386.c,v 1.26 2011/12/04 17:00:10 chs Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -57,7 +57,7 @@
#include <sys/cdefs.h>
#ifndef lint
-__RCSID("$NetBSD: i386.c,v 1.25 2011/05/03 09:06:22 jruoho Exp $");
+__RCSID("$NetBSD: i386.c,v 1.26 2011/12/04 17:00:10 chs Exp $");
#endif /* not lint */
#include <sys/types.h>
@@ -182,6 +182,7 @@
static int cpu_vendor;
static char cpu_brand_string[49];
static char amd_brand_name[48];
+static int use_pae, largepagesize;
static void via_cpu_probe(struct cpu_info *);
static void amd_family6_probe(struct cpu_info *);
@@ -1380,6 +1381,9 @@
sz = sizeof(ci->ci_tsc_freq);
(void)sysctlbyname("machdep.tsc_freq", &ci->ci_tsc_freq, &sz, NULL, 0);
+ sz = sizeof(use_pae);
+ (void)sysctlbyname("machdep.pae", &use_pae, &sz, NULL, 0);
+ largepagesize = (use_pae ? 2 * 1024 * 1024 : 4 * 1024 * 1024);
snprintf(cpu_model, sizeof(cpu_model), "%s%s%s%s%s%s%s (%s-class)",
vendorname,
@@ -1669,12 +1673,12 @@
cai = &ci->ci_cinfo[CAI_ITLB2];
cai->cai_totalsize = AMD_L1_EAX_ITLB_ENTRIES(descs[0]);
cai->cai_associativity = AMD_L1_EAX_ITLB_ASSOC(descs[0]);
- cai->cai_linesize = (4 * 1024 * 1024);
+ cai->cai_linesize = largepagesize;
cai = &ci->ci_cinfo[CAI_DTLB2];
cai->cai_totalsize = AMD_L1_EAX_DTLB_ENTRIES(descs[0]);
cai->cai_associativity = AMD_L1_EAX_DTLB_ASSOC(descs[0]);
- cai->cai_linesize = (4 * 1024 * 1024);
+ cai->cai_linesize = largepagesize;
}
cai = &ci->ci_cinfo[CAI_ITLB];
@@ -1707,6 +1711,50 @@
x86_cpuid(0x80000006, descs);
+ cai = &ci->ci_cinfo[CAI_L2_ITLB];
+ cai->cai_totalsize = AMD_L2_EBX_IUTLB_ENTRIES(descs[1]);
+ cai->cai_associativity = AMD_L2_EBX_IUTLB_ASSOC(descs[1]);
+ cai->cai_linesize = (4 * 1024);
+ cp = cache_info_lookup(amd_cpuid_l2cache_assoc_info,
+ cai->cai_associativity);
+ if (cp != NULL)
+ cai->cai_associativity = cp->cai_associativity;
+ else
+ cai->cai_associativity = 0; /* XXX Unknown/reserved */
+
+ cai = &ci->ci_cinfo[CAI_L2_ITLB2];
+ cai->cai_totalsize = AMD_L2_EAX_IUTLB_ENTRIES(descs[0]);
+ cai->cai_associativity = AMD_L2_EAX_IUTLB_ASSOC(descs[0]);
+ cai->cai_linesize = largepagesize;
+ cp = cache_info_lookup(amd_cpuid_l2cache_assoc_info,
+ cai->cai_associativity);
+ if (cp != NULL)
+ cai->cai_associativity = cp->cai_associativity;
+ else
+ cai->cai_associativity = 0; /* XXX Unknown/reserved */
+
+ cai = &ci->ci_cinfo[CAI_L2_DTLB];
+ cai->cai_totalsize = AMD_L2_EBX_DTLB_ENTRIES(descs[1]);
+ cai->cai_associativity = AMD_L2_EBX_DTLB_ASSOC(descs[1]);
+ cai->cai_linesize = (4 * 1024);
+ cp = cache_info_lookup(amd_cpuid_l2cache_assoc_info,
+ cai->cai_associativity);
+ if (cp != NULL)
+ cai->cai_associativity = cp->cai_associativity;
+ else
+ cai->cai_associativity = 0; /* XXX Unknown/reserved */
+
+ cai = &ci->ci_cinfo[CAI_L2_DTLB2];
+ cai->cai_totalsize = AMD_L2_EAX_DTLB_ENTRIES(descs[0]);
+ cai->cai_associativity = AMD_L2_EAX_DTLB_ASSOC(descs[0]);
+ cai->cai_linesize = largepagesize;
+ cp = cache_info_lookup(amd_cpuid_l2cache_assoc_info,
+ cai->cai_associativity);
+ if (cp != NULL)
+ cai->cai_associativity = cp->cai_associativity;
+ else
+ cai->cai_associativity = 0; /* XXX Unknown/reserved */
+
cai = &ci->ci_cinfo[CAI_L2CACHE];
cai->cai_totalsize = AMD_L2_ECX_C_SIZE(descs[2]);
cai->cai_associativity = AMD_L2_ECX_C_ASSOC(descs[2]);
@@ -1735,6 +1783,60 @@
else
cai->cai_associativity = 0; /* XXX Unkn/Rsvd */
}
+
+ /*
+ * Determine 1GB TLB info.
+ */
+ if (lfunc < 0x80000019) {
+ /* No 1GB TLB info available. */
+ return;
+ }
+
+ x86_cpuid(0x80000019, descs);
+
+ cai = &ci->ci_cinfo[CAI_L1_1GBITLB];
+ cai->cai_totalsize = AMD_L1_1GB_EAX_IUTLB_ENTRIES(descs[0]);
+ cai->cai_associativity = AMD_L1_1GB_EAX_IUTLB_ASSOC(descs[0]);
+ cai->cai_linesize = (1024 * 1024 * 1024);
+ cp = cache_info_lookup(amd_cpuid_l2cache_assoc_info,
+ cai->cai_associativity);
+ if (cp != NULL)
+ cai->cai_associativity = cp->cai_associativity;
+ else
+ cai->cai_associativity = 0; /* XXX Unknown/reserved */
+
+ cai = &ci->ci_cinfo[CAI_L1_1GBDTLB];
+ cai->cai_totalsize = AMD_L1_1GB_EAX_DTLB_ENTRIES(descs[0]);
+ cai->cai_associativity = AMD_L1_1GB_EAX_DTLB_ASSOC(descs[0]);
+ cai->cai_linesize = (1024 * 1024 * 1024);
+ cp = cache_info_lookup(amd_cpuid_l2cache_assoc_info,
+ cai->cai_associativity);
+ if (cp != NULL)
+ cai->cai_associativity = cp->cai_associativity;
+ else
+ cai->cai_associativity = 0; /* XXX Unknown/reserved */
+
+ cai = &ci->ci_cinfo[CAI_L2_1GBITLB];
+ cai->cai_totalsize = AMD_L2_1GB_EBX_IUTLB_ENTRIES(descs[1]);
+ cai->cai_associativity = AMD_L2_1GB_EBX_IUTLB_ASSOC(descs[1]);
+ cai->cai_linesize = (1024 * 1024 * 1024);
+ cp = cache_info_lookup(amd_cpuid_l2cache_assoc_info,
+ cai->cai_associativity);
+ if (cp != NULL)
+ cai->cai_associativity = cp->cai_associativity;
+ else
+ cai->cai_associativity = 0; /* XXX Unknown/reserved */
+
+ cai = &ci->ci_cinfo[CAI_L2_1GBDTLB];
+ cai->cai_totalsize = AMD_L2_1GB_EBX_DUTLB_ENTRIES(descs[1]);
+ cai->cai_associativity = AMD_L2_1GB_EBX_DUTLB_ASSOC(descs[1]);
+ cai->cai_linesize = (1024 * 1024 * 1024);
+ cp = cache_info_lookup(amd_cpuid_l2cache_assoc_info,
+ cai->cai_associativity);
+ if (cp != NULL)
+ cai->cai_associativity = cp->cai_associativity;
+ else
+ cai->cai_associativity = 0; /* XXX Unknown/reserved */
}
static void
@@ -1832,6 +1934,11 @@
if (sep != NULL)
aprint_verbose("\n");
}
+ if (ci->ci_cinfo[CAI_L3CACHE].cai_totalsize != 0) {
+ sep = print_cache_config(ci, CAI_L3CACHE, "L3 cache", NULL);
+ if (sep != NULL)
+ aprint_verbose("\n");
+ }
if (ci->ci_cinfo[CAI_ITLB].cai_totalsize != 0) {
sep = print_tlb_config(ci, CAI_ITLB, "ITLB", NULL);
sep = print_tlb_config(ci, CAI_ITLB2, NULL, sep);
@@ -1844,8 +1951,35 @@
if (sep != NULL)
aprint_verbose("\n");
}
- if (ci->ci_cinfo[CAI_L3CACHE].cai_totalsize != 0) {
- sep = print_cache_config(ci, CAI_L3CACHE, "L3 cache", NULL);
+ if (ci->ci_cinfo[CAI_L2_ITLB].cai_totalsize != 0) {
+ sep = print_tlb_config(ci, CAI_L2_ITLB, "L2 ITLB", NULL);
+ sep = print_tlb_config(ci, CAI_L2_ITLB2, NULL, sep);
+ if (sep != NULL)
+ aprint_verbose("\n");
+ }
+ if (ci->ci_cinfo[CAI_L2_DTLB].cai_totalsize != 0) {
+ sep = print_tlb_config(ci, CAI_L2_DTLB, "L2 DTLB", NULL);
+ sep = print_tlb_config(ci, CAI_L2_DTLB2, NULL, sep);
+ if (sep != NULL)
+ aprint_verbose("\n");
+ }
+ if (ci->ci_cinfo[CAI_L1_1GBITLB].cai_totalsize != 0) {
+ sep = print_tlb_config(ci, CAI_L1_1GBITLB, "L1 1GB page ITLB", NULL);
+ if (sep != NULL)
+ aprint_verbose("\n");
+ }
+ if (ci->ci_cinfo[CAI_L1_1GBDTLB].cai_totalsize != 0) {
+ sep = print_tlb_config(ci, CAI_L1_1GBDTLB, "L1 1GB page DTLB", NULL);
+ if (sep != NULL)
+ aprint_verbose("\n");
+ }
+ if (ci->ci_cinfo[CAI_L2_1GBITLB].cai_totalsize != 0) {
+ sep = print_tlb_config(ci, CAI_L2_1GBITLB, "L2 1GB page ITLB", NULL);
+ if (sep != NULL)
+ aprint_verbose("\n");
+ }
+ if (ci->ci_cinfo[CAI_L2_1GBDTLB].cai_totalsize != 0) {
+ sep = print_tlb_config(ci, CAI_L2_1GBDTLB, "L2 1GB page DTLB", NULL);
if (sep != NULL)
aprint_verbose("\n");
}
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