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[src/trunk]: src/sys/arch/powerpc Add IST_PULSE and intr_typename (converts I...



details:   https://anonhg.NetBSD.org/src/rev/a8ee08ec69be
branches:  trunk
changeset: 766102:a8ee08ec69be
user:      matt <matt%NetBSD.org@localhost>
date:      Wed Jun 15 15:11:50 2011 +0000

description:
Add IST_PULSE and intr_typename (converts IST_* to a name).

diffstat:

 sys/arch/powerpc/booke/e500_intr.c    |  20 +++++++++++++++++++-
 sys/arch/powerpc/include/booke/intr.h |  22 +++++++++++++---------
 2 files changed, 32 insertions(+), 10 deletions(-)

diffs (123 lines):

diff -r a5deb0203edf -r a8ee08ec69be sys/arch/powerpc/booke/e500_intr.c
--- a/sys/arch/powerpc/booke/e500_intr.c        Wed Jun 15 15:03:51 2011 +0000
+++ b/sys/arch/powerpc/booke/e500_intr.c        Wed Jun 15 15:11:50 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: e500_intr.c,v 1.10 2011/06/14 22:36:12 matt Exp $      */
+/*     $NetBSD: e500_intr.c,v 1.11 2011/06/15 15:11:50 matt Exp $      */
 /*-
  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -215,6 +215,7 @@
                [IST_EDGE]              = 0,                            \
                [IST_LEVEL_LOW]         = 0,                            \
                [IST_LEVEL_HIGH]        = 0,                            \
+               [IST_PULSE]             = 0,                            \
                [IST_ONCHIP]            = UC_CHIP ## _EXTERNALSOURCES,  \
                [IST_MSIGROUP]          = UC_CHIP ## _EXTERNALSOURCES   \
                                            + UC_CHIP ## _ONCHIPSOURCES, \
@@ -334,6 +335,7 @@
        [IST_EDGE] = "edge",
        [IST_LEVEL_LOW] = "level-",
        [IST_LEVEL_HIGH] = "level+",
+       [IST_PULSE] = "pulse",
        [IST_MSI] = "msi",
        [IST_ONCHIP] = "onchip",
        [IST_MSIGROUP] = "msigroup",
@@ -352,6 +354,7 @@
 static void    e500_intr_cpu_send_ipi(cpuid_t, uintptr_t);
 static void    e500_intr_init(void);
 static const char *e500_intr_string(int, int);
+static const char *e500_intr_typename(int);
 static void    e500_critintr(struct trapframe *tf);
 static void    e500_decrintr(struct trapframe *tf);
 static void    e500_extintr(struct trapframe *tf);
@@ -369,6 +372,7 @@
        .intrsw_cpu_hatch = e500_intr_cpu_hatch,
        .intrsw_cpu_send_ipi = e500_intr_cpu_send_ipi,
        .intrsw_string = e500_intr_string,
+       .intrsw_typename = e500_intr_typename,
 
        .intrsw_critintr = e500_critintr,
        .intrsw_decrintr = e500_decrintr,
@@ -590,6 +594,9 @@
                        || ist == IST_LEVEL_LOW
                        || ist == IST_LEVEL_HIGH);
                break;
+       case IST_PULSE:
+               ok = false;
+               break;
        case IST_ONCHIP:
                ii->irq_vpr = OPENPIC_IIVPR(irq);
                ii->irq_dr  = OPENPIC_IIDR(irq);
@@ -647,6 +654,17 @@
        return cpu->cpu_evcnt_intrs[ii.irq_vector].ev_name;
 }
 
+__CTASSERT(__arraycount(ist_names) == IST_MAX);
+
+static const char *
+e500_intr_typename(int ist)
+{
+       if (IST_NONE <= ist && ist < IST_MAX)
+               return ist_names[ist];
+
+       return NULL;
+}
+
 static void *
 e500_intr_cpu_establish(struct cpu_info *ci, int irq, int ipl, int ist,
        int (*handler)(void *), void *arg)
diff -r a5deb0203edf -r a8ee08ec69be sys/arch/powerpc/include/booke/intr.h
--- a/sys/arch/powerpc/include/booke/intr.h     Wed Jun 15 15:03:51 2011 +0000
+++ b/sys/arch/powerpc/include/booke/intr.h     Wed Jun 15 15:11:50 2011 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: intr.h,v 1.4 2011/06/05 16:52:25 matt Exp $    */
+/*     $NetBSD: intr.h,v 1.5 2011/06/15 15:11:50 matt Exp $    */
 /*-
  * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -50,18 +50,19 @@
 
 /* Interrupt sharing types. */
 #define        IST_NONE        (NIPL+0) /* none */
-#define        IST_EDGE        (NIPL+1)        /* edge-triggered */
+#define        IST_EDGE        (NIPL+1) /* edge-triggered */
 #define        IST_LEVEL       (NIPL+2) /* level-triggered active-low */
 #define        IST_LEVEL_LOW   IST_LEVEL
 #define        IST_LEVEL_HIGH  (NIPL+3) /* level-triggered active-high */
-#define        IST_MSI         (NIPL+4) /* message signaling interrupt (PCI) */
-#define        IST_ONCHIP      (NIPL+5) /* on-chip device */
+#define        IST_PULSE       (NIPL+4) /* pulsed */
+#define        IST_MSI         (NIPL+5) /* message signaling interrupt (PCI) */
+#define        IST_ONCHIP      (NIPL+6) /* on-chip device */
 #ifdef __INTR_PRIVATE
-#define        IST_MSIGROUP    (NIPL+6) /* openpic msi groups */
-#define        IST_TIMER       (NIPL+7) /* openpic timers */
-#define        IST_IPI         (NIPL+8) /* openpic ipi */
-#define        IST_MI          (NIPL+9) /* openpic message */
-#define IST_MAX                (NIPL+10)
+#define        IST_MSIGROUP    (NIPL+7) /* openpic msi groups */
+#define        IST_TIMER       (NIPL+8) /* openpic timers */
+#define        IST_IPI         (NIPL+9) /* openpic ipi */
+#define        IST_MI          (NIPL+10) /* openpic message */
+#define        IST_MAX         (NIPL+11)
 #endif
 
 #define        IPI_DST_ALL     ((cpuid_t)-2)
@@ -85,6 +86,8 @@
 void   intr_init(void);
 const char *
        intr_string(int, int);
+const char *
+       intr_typename(int);
 
 void   cpu_send_ipi(cpuid_t, uint32_t);
 
@@ -124,6 +127,7 @@
        void (*intrsw_spl0)(void);
        void (*intrsw_splx)(int);
        const char *(*intrsw_string)(int, int);
+       const char *(*intrsw_typename)(int);
 #ifdef __HAVE_FAST_SOFTINTS
        void (*intrsw_softint_init_md)(struct lwp *, u_int, uintptr_t *);
        void (*intrsw_softint_trigger)(uintptr_t);



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