[src/trunk]: src/sys/arch/sandpoint/stand/altboot NH230 PPCBoot configures th...

[phx <phx%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/1d058b79488b
branches:  trunk
changeset: 772545:1d058b79488b
user:      phx <phx%NetBSD.org@localhost>
date:      Sat Jan 07 19:57:49 2012 +0000

description:
NH230 PPCBoot configures the memory boundary registers for 128MB, although
the board has only 64MB. Fix that.

diffstat:

 sys/arch/sandpoint/stand/altboot/brdsetup.c |  95 ++++++++++++++++++----------
 sys/arch/sandpoint/stand/altboot/globals.h  |   3 +-
 2 files changed, 61 insertions(+), 37 deletions(-)

diffs (154 lines):

diff -r 608536cec229 -r 1d058b79488b sys/arch/sandpoint/stand/altboot/brdsetup.c
--- a/sys/arch/sandpoint/stand/altboot/brdsetup.c       Sat Jan 07 19:48:19 2012 +0000
+++ b/sys/arch/sandpoint/stand/altboot/brdsetup.c       Sat Jan 07 19:57:49 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: brdsetup.c,v 1.23 2011/11/12 23:52:54 phx Exp $ */
+/* $NetBSD: brdsetup.c,v 1.24 2012/01/07 19:57:49 phx Exp $ */
 
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
@@ -125,6 +125,13 @@
        NULL, NULL, NULL, NULL }, /* must be the last */
 };
 
+/* MPC106 and MPC824x PCI bridge memory configuration */
+#define MPC106_MEMSTARTADDR1   0x80
+#define MPC106_EXTMEMSTARTADDR1        0x88
+#define MPC106_MEMENDADDR1     0x90
+#define MPC106_EXTMEMENDADDR1  0x98
+#define MPC106_MEMEN           0xa0
+
 /* Iomega StorCenter MC68HC908 microcontroller data packet */
 #define IOMEGA_POWER           0
 #define IOMEGA_LED             1
@@ -148,6 +155,7 @@
 static inline u_quad_t mftb(void);
 static void init_uart(unsigned, unsigned, uint8_t);
 static void send_sat(char *);
+static unsigned mpc107memsize(void);
 
 const unsigned dcache_line_size = 32;          /* 32B linesize */
 const unsigned dcache_range_size = 4 * 1024;   /* 16KB / 4-way */
@@ -1002,8 +1010,49 @@
        return (UART_READ(uart1base, LSR) & LSR_DRDY) != 0;
 }
 
-unsigned
-mpc107memsize()
+#define SAR_MASK 0x0ff00000
+#define SAR_SHIFT    20
+#define EAR_MASK 0x30000000
+#define EAR_SHIFT    28
+#define AR(v, s) ((((v) & SAR_MASK) >> SAR_SHIFT) << (s))
+#define XR(v, s) ((((v) & EAR_MASK) >> EAR_SHIFT) << (s))
+static void
+set_mem_bounds(unsigned tag, unsigned bk_en, ...)
+{
+       unsigned mbst, mbxst, mben, mbxen;
+       unsigned start, end;
+       va_list ap;
+       int i, sh;
+
+       va_start(ap, bk_en);
+       mbst = mbxst = mben = mbxen = 0;
+
+       for (i = 0; i < 4; i++) {
+               if ((bk_en & (1U << i)) != 0) {
+                       start = va_arg(ap, unsigned);
+                       end = va_arg(ap, unsigned);
+               } else {
+                       start = 0x3ff00000;
+                       end = 0x3fffffff;
+               }
+               sh = i << 3;
+               mbst |= AR(start, sh);
+               mbxst |= XR(start, sh);
+               mben |= AR(end, sh);
+               mbxen |= XR(end, sh);
+       }
+       va_end(ap);
+
+       pcicfgwrite(tag, MPC106_MEMSTARTADDR1, mbst);
+       pcicfgwrite(tag, MPC106_EXTMEMSTARTADDR1, mbxst);
+       pcicfgwrite(tag, MPC106_MEMENDADDR1, mben);
+       pcicfgwrite(tag, MPC106_EXTMEMENDADDR1, mbxen);
+       pcicfgwrite(tag, MPC106_MEMEN,
+           (pcicfgread(tag, MPC106_MEMEN) & ~0xff) | (bk_en & 0xff));
+}
+
+static unsigned
+mpc107memsize(void)
 {
        unsigned bankn, end, n, tag, val;
 
@@ -1011,37 +1060,13 @@
 
        if (brdtype == BRD_ENCOREPP1) {
                /* the brd's PPCBOOT looks to have erroneous values */
-               unsigned tbl[] = {
-#define MPC106_MEMSTARTADDR1   0x80
-#define MPC106_EXTMEMSTARTADDR1        0x88
-#define MPC106_MEMENDADDR1     0x90
-#define MPC106_EXTMEMENDADDR1  0x98
-#define MPC106_MEMEN           0xa0
-#define        BK0_S   0x00000000
-#define        BK0_E   (128 << 20) - 1
-#define BK1_S  0x3ff00000
-#define BK1_E  0x3fffffff
-#define BK2_S  0x3ff00000
-#define BK2_E  0x3fffffff
-#define BK3_S  0x3ff00000
-#define BK3_E  0x3fffffff
-#define AR(v, s) ((((v) & SAR_MASK) >> SAR_SHIFT) << (s))
-#define XR(v, s) ((((v) & EAR_MASK) >> EAR_SHIFT) << (s))
-#define SAR_MASK 0x0ff00000
-#define SAR_SHIFT    20
-#define EAR_MASK 0x30000000
-#define EAR_SHIFT    28
-               AR(BK0_S, 0) | AR(BK1_S, 8) | AR(BK2_S, 16) | AR(BK3_S, 24),
-               XR(BK0_S, 0) | XR(BK1_S, 8) | XR(BK2_S, 16) | XR(BK3_S, 24),
-               AR(BK0_E, 0) | AR(BK1_E, 8) | AR(BK2_E, 16) | AR(BK3_E, 24),
-               XR(BK0_E, 0) | XR(BK1_E, 8) | XR(BK2_E, 16) | XR(BK3_E, 24),
-               };
-               tag = pcimaketag(0, 0, 0);
-               pcicfgwrite(tag, MPC106_MEMSTARTADDR1, tbl[0]);
-               pcicfgwrite(tag, MPC106_EXTMEMSTARTADDR1, tbl[1]);
-               pcicfgwrite(tag, MPC106_MEMENDADDR1, tbl[2]);
-               pcicfgwrite(tag, MPC106_EXTMEMENDADDR1, tbl[3]);
-               pcicfgwrite(tag, MPC106_MEMEN, 1);
+               set_mem_bounds(tag, 1, 0x00000000, (128 << 20) - 1);
+       } else if (brdtype == BRD_NH230NAS) {
+               /*
+                * PPCBoot sets the end address to 0x7ffffff, although the
+                * board has just 64MB (0x3ffffff).
+                */
+               set_mem_bounds(tag, 1, 0x00000000, 0x03ffffff);
        }
 
        bankn = 0;
@@ -1051,7 +1076,7 @@
                        break;
                bankn = n;
        }
-       bankn = bankn * 8;
+       bankn <<= 3;
 
        val = pcicfgread(tag, MPC106_EXTMEMENDADDR1);
        end =  ((val >> bankn) & 0x03) << 28;
diff -r 608536cec229 -r 1d058b79488b sys/arch/sandpoint/stand/altboot/globals.h
--- a/sys/arch/sandpoint/stand/altboot/globals.h        Sat Jan 07 19:48:19 2012 +0000
+++ b/sys/arch/sandpoint/stand/altboot/globals.h        Sat Jan 07 19:57:49 2012 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: globals.h,v 1.14 2011/11/06 20:20:57 phx Exp $ */
+/* $NetBSD: globals.h,v 1.15 2012/01/07 19:57:49 phx Exp $ */
 
 #ifdef DEBUG
 #define        DPRINTF(x)      printf x
@@ -48,7 +48,6 @@
 int sat_getch(void);
 int sat_tstch(void);
 #endif
-unsigned mpc107memsize(void);
 void read_mac_from_flash(uint8_t *);
 
 /* PPC processor ctl */