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[src/trunk]: src/sys/arch/i386/include Fix typos in PAE comment.
details: https://anonhg.NetBSD.org/src/rev/da059fa75b92
branches: trunk
changeset: 753687:da059fa75b92
user: jld <jld%NetBSD.org@localhost>
date: Tue Apr 06 20:43:57 2010 +0000
description:
Fix typos in PAE comment.
diffstat:
sys/arch/i386/include/pte.h | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diffs (23 lines):
diff -r 679b9fc1d9cf -r da059fa75b92 sys/arch/i386/include/pte.h
--- a/sys/arch/i386/include/pte.h Tue Apr 06 20:15:22 2010 +0000
+++ b/sys/arch/i386/include/pte.h Tue Apr 06 20:43:57 2010 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pte.h,v 1.21 2010/02/26 19:25:07 jym Exp $ */
+/* $NetBSD: pte.h,v 1.22 2010/04/06 20:43:57 jld Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -164,10 +164,10 @@
*
* The PAE extension extends the size of the PTE to 64 bits (52bits physical
* address) and is compatible with the amd64 PTE format. The first level
- * maps 2M, the second 1G, so a third level page table is intruduced to
+ * maps 2M, the second 1G, so a third level page table is introduced to
* map the 4GB virtual address space. This PD has only 4 entries.
- * We can't use recursive mapping at level 3 to map the PD pages, as
- * this would eat one GB of address space. In addition, Xen impose restrictions
+ * We can't use recursive mapping at level 3 to map the PD pages, as this
+ * would eat one GB of address space. In addition, Xen imposes restrictions
* on the entries we put in the L3 page (for example, the page pointed to by
* the last slot can't be shared among different L3 pages), which makes
* handling this L3 page in the same way we do for L2 on i386 (or L4 on amd64)
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