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[src/trunk]: src/sys/arch/evbarm/odroid For Exynos4 platforms, re-implement P...



details:   https://anonhg.NetBSD.org/src/rev/6ea51b07ffce
branches:  trunk
changeset: 795467:6ea51b07ffce
user:      reinoud <reinoud%NetBSD.org@localhost>
date:      Mon Apr 14 19:45:40 2014 +0000

description:
For Exynos4 platforms, re-implement PoP detection so we can detect 1Gb
systems.

diffstat:

 sys/arch/evbarm/odroid/odroid_machdep.c |  20 +++++++++++++-------
 sys/arch/evbarm/odroid/odroid_start.S   |  16 +++++++++++++---
 2 files changed, 26 insertions(+), 10 deletions(-)

diffs (97 lines):

diff -r e9652f381421 -r 6ea51b07ffce sys/arch/evbarm/odroid/odroid_machdep.c
--- a/sys/arch/evbarm/odroid/odroid_machdep.c   Mon Apr 14 18:18:58 2014 +0000
+++ b/sys/arch/evbarm/odroid/odroid_machdep.c   Mon Apr 14 19:45:40 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: odroid_machdep.c,v 1.4 2014/04/13 20:53:35 reinoud Exp $ */
+/*     $NetBSD: odroid_machdep.c,v 1.5 2014/04/14 19:45:40 reinoud Exp $ */
 
 /*
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -31,7 +31,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: odroid_machdep.c,v 1.4 2014/04/13 20:53:35 reinoud Exp $");
+__KERNEL_RCSID(0, "$NetBSD: odroid_machdep.c,v 1.5 2014/04/14 19:45:40 reinoud Exp $");
 
 #include "opt_evbarm_boardtype.h"
 #include "opt_exynos.h"
@@ -265,6 +265,7 @@
        const struct pmap_devmap const *devmap;
        bus_addr_t rambase;
        const psize_t ram_reserve = 0x200000;
+       psize_t ram_size;
 
        /* allocate/map our basic memory mapping */
        switch (EXYNOS_PRODUCT_FAMILY(exynos_soc_id)) {
@@ -344,20 +345,25 @@
        bootconfig.dram[0].address = rambase;
 
        /*
-        * Determine physical memory by looking at the PoP package
+        * Determine physical memory by looking at the PoP package. This PoP
+        * package ID seems to be only available on Exynos4
+        *
+        * First assume the default 2Gb of memory, dictated by mapping too
         */
+       ram_size = (psize_t) 0xC0000000 - 0x40000000;
 
-       psize_t ram_size = (psize_t) 0xC0000000 - 0x40000000;
-#if 0
+#if defined(EXYNOS4)
        switch (exynos_pop_id) {
        case EXYNOS_PACKAGE_ID_2_GIG:
-               ram_size = (psize_t) 2*1024*1024*1024;
+               KASSERT(ram_size <= 2UL*1024*1024*1024);
                break;
        default:
-               printf("Unknown PoP package id 0x%08x\n", exynos_pop_id);
+               printf("Unknown PoP package id 0x%08x, assuming 1Gb\n",
+                       exynos_pop_id);
                ram_size = (psize_t) 0x10000000;
        }
 #endif
+
        /*
         * Configure DMA tags
         */
diff -r e9652f381421 -r 6ea51b07ffce sys/arch/evbarm/odroid/odroid_start.S
--- a/sys/arch/evbarm/odroid/odroid_start.S     Mon Apr 14 18:18:58 2014 +0000
+++ b/sys/arch/evbarm/odroid/odroid_start.S     Mon Apr 14 19:45:40 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: odroid_start.S,v 1.1 2014/04/13 02:26:26 matt Exp $    */
+/*     $NetBSD: odroid_start.S,v 1.2 2014/04/14 19:45:40 reinoud Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -46,7 +46,7 @@
 
 #include <evbarm/odroid/platform.h>
 
-RCSID("$NetBSD: odroid_start.S,v 1.1 2014/04/13 02:26:26 matt Exp $")
+RCSID("$NetBSD: odroid_start.S,v 1.2 2014/04/14 19:45:40 reinoud Exp $")
 
 
 #if defined(VERBOSE_INIT_ARM)
@@ -110,10 +110,20 @@
        movt    r4, #:upper16:exynos_soc_id
        sub     r4, r4, #KERNEL_BASE_VOFFSET
        str     r0, [r4]                                // save soc_id
+       mov     r5, r0                                  // save soc_id
+
+#ifdef EXYNOS4
+       ldr     r0, [r6, #EXYNOS_PACKAGE_ID_OFFSET]             // load pop_id
+
+       movw    r4, #:lower16:exynos_pop_id
+       movt    r4, #:upper16:exynos_pop_id
+       sub     r4, r4, #KERNEL_BASE_VOFFSET
+       str     r0, [r4]                                // save pop_id
+#endif
 
        /* Pick uart address and initial MMU table for the SoC */
        mov     r2, #0
-       ubfx    r1, r0, #24, #8
+       ubfx    r1, r5, #24, #8
        cmp     r1, #0xe5
        movteq  r2, #:upper16:(EXYNOS_CORE_PBASE + EXYNOS5_UART2_OFFSET)
        cmp     r1, #0xe4



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