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[src/trunk]: src/sys/arch/arm/include Use dmb/dsb
details: https://anonhg.NetBSD.org/src/rev/57ea382895b3
branches: trunk
changeset: 794909:57ea382895b3
user: matt <matt%NetBSD.org@localhost>
date: Fri Mar 28 21:40:53 2014 +0000
description:
Use dmb/dsb
diffstat:
sys/arch/arm/include/mutex.h | 18 +++++++++++++++++-
sys/arch/arm/include/rwlock.h | 12 +++++++++++-
2 files changed, 28 insertions(+), 2 deletions(-)
diffs (66 lines):
diff -r 2f20bd3be6cc -r 57ea382895b3 sys/arch/arm/include/mutex.h
--- a/sys/arch/arm/include/mutex.h Fri Mar 28 21:39:09 2014 +0000
+++ b/sys/arch/arm/include/mutex.h Fri Mar 28 21:40:53 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mutex.h,v 1.13 2012/09/25 05:24:00 matt Exp $ */
+/* $NetBSD: mutex.h,v 1.14 2014/03/28 21:40:53 matt Exp $ */
/*-
* Copyright (c) 2002, 2007 The NetBSD Foundation, Inc.
@@ -88,12 +88,28 @@
* MUTEX_RECEIVE: no memory barrier required; we're synchronizing against
* interrupts, not multiple processors.
*/
+#ifdef MULTIPROCESSOR
+#if defined(_ARM_ARCH_7) && !defined(_ARM_ARCH_6)
+#define MUTEX_RECEIVE(mtx) __asm __volatile("dmb")
+#else
+#define MUTEX_RECEIVE(mtx) membar_consumer()
+#endif
+#else
#define MUTEX_RECEIVE(mtx) /* nothing */
+#endif
/*
* MUTEX_GIVE: no memory barrier required; same reason.
*/
+#ifdef MULTIPROCESSOR
+#if defined(_ARM_ARCH_7) && !defined(_ARM_ARCH_6)
+#define MUTEX_RECEIVE(mtx) __asm __volatile("dsb")
+#else
+#define MUTEX_GIVE(mtx) membar_producer()
+#endif
+#else
#define MUTEX_GIVE(mtx) /* nothing */
+#endif
#define MUTEX_CAS(p, o, n) \
(atomic_cas_ulong((volatile unsigned long *)(p), (o), (n)) == (o))
diff -r 2f20bd3be6cc -r 57ea382895b3 sys/arch/arm/include/rwlock.h
--- a/sys/arch/arm/include/rwlock.h Fri Mar 28 21:39:09 2014 +0000
+++ b/sys/arch/arm/include/rwlock.h Fri Mar 28 21:40:53 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rwlock.h,v 1.6 2014/01/29 00:17:21 matt Exp $ */
+/* $NetBSD: rwlock.h,v 1.7 2014/03/28 21:40:53 matt Exp $ */
/*-
* Copyright (c) 2002, 2006 The NetBSD Foundation, Inc.
@@ -40,8 +40,18 @@
#define __HAVE_SIMPLE_RW_LOCKS 1
+#ifdef MULTIPROCESSOR
+#if defined(_ARM_ARCH_7) && !defined(_ARM_ARCH_6)
+#define RW_RECEIVE(rw) __asm __volatile("dmb")
+#define RW_GIVE(rw) __asm __volatile("dsb")
+#else
+#define RW_RECEIVE(rw) membar_consumer()
+#define RW_GIVE(rw) membar_producer()
+#endif
+#else
#define RW_RECEIVE(rw) /* nothing */
#define RW_GIVE(rw) /* nothing */
+#endif
#define RW_CAS(p, o, n) \
(atomic_cas_ulong((volatile unsigned long *)(p), (o), (n)) == (o))
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