[src/trunk]: src/sys/arch/arm/nvidia Ignore dc parent clock from devicetree a...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/60de3f2b885f
branches:  trunk
changeset: 823495:60de3f2b885f
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Wed Apr 26 01:42:46 2017 +0000

description:
Ignore dc parent clock from devicetree and use hdmi parent for dc.

diffstat:

 sys/arch/arm/nvidia/tegra_drm_mode.c |  12 ++++++------
 1 files changed, 6 insertions(+), 6 deletions(-)

diffs (48 lines):

diff -r 37462362b665 -r 60de3f2b885f sys/arch/arm/nvidia/tegra_drm_mode.c
--- a/sys/arch/arm/nvidia/tegra_drm_mode.c      Tue Apr 25 22:07:10 2017 +0000
+++ b/sys/arch/arm/nvidia/tegra_drm_mode.c      Wed Apr 26 01:42:46 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_drm_mode.c,v 1.13 2017/04/16 12:22:18 jmcneill Exp $ */
+/* $NetBSD: tegra_drm_mode.c,v 1.14 2017/04/26 01:42:46 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_drm_mode.c,v 1.13 2017/04/16 12:22:18 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_drm_mode.c,v 1.14 2017/04/26 01:42:46 jmcneill Exp $");
 
 #include <drm/drmP.h>
 #include <drm/drm_crtc.h>
@@ -290,7 +290,7 @@
        int error;
 
        if (sc->sc_clk_dc[index] == NULL ||
-           sc->sc_clk_dc_parent[index] == NULL ||
+           sc->sc_clk_hdmi_parent == NULL ||
            sc->sc_rst_dc[index] == NULL) {
                DRM_ERROR("no clocks configured for crtc %d\n", index);
                return -EIO;
@@ -344,9 +344,9 @@
        tegra_pmc_power(pmc_partid, true);
        tegra_pmc_remove_clamping(pmc_partid);
 
-       /* Set parent clock */
+       /* Set parent clock to the HDMI parent (ignoring DC parent in DT!) */
        error = clk_set_parent(sc->sc_clk_dc[index],
-           sc->sc_clk_dc_parent[index]);
+           sc->sc_clk_hdmi_parent);
        if (error) {
                DRM_ERROR("failed to set crtc %d clock parent: %d\n",
                    index, error);
@@ -363,7 +363,7 @@
        /* Leave reset */
        fdtbus_reset_deassert(sc->sc_rst_dc[index]);
 
-       crtc->clk_parent = sc->sc_clk_dc_parent[index];
+       crtc->clk_parent = sc->sc_clk_hdmi_parent;
 
        DC_WRITE(crtc, DC_CMD_INT_ENABLE_REG, DC_CMD_INT_V_BLANK);