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[src/trunk]: src/sys/arch/arm/rockchip More clock fixes, debugging.



details:   https://anonhg.NetBSD.org/src/rev/5e96a4286c64
branches:  trunk
changeset: 805278:5e96a4286c64
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Dec 27 16:18:50 2014 +0000

description:
More clock fixes, debugging.

diffstat:

 sys/arch/arm/rockchip/files.rockchip    |   5 +-
 sys/arch/arm/rockchip/obio.c            |  27 ++++++++++-
 sys/arch/arm/rockchip/rockchip_board.c  |  79 ++++++++++++++++++++++++++++++--
 sys/arch/arm/rockchip/rockchip_crureg.h |  14 +++--
 sys/arch/arm/rockchip/rockchip_var.h    |   6 ++-
 5 files changed, 117 insertions(+), 14 deletions(-)

diffs (265 lines):

diff -r 77010335f6f5 -r 5e96a4286c64 sys/arch/arm/rockchip/files.rockchip
--- a/sys/arch/arm/rockchip/files.rockchip      Sat Dec 27 15:52:42 2014 +0000
+++ b/sys/arch/arm/rockchip/files.rockchip      Sat Dec 27 16:18:50 2014 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: files.rockchip,v 1.2 2014/12/26 19:44:48 jmcneill Exp $
+#      $NetBSD: files.rockchip,v 1.3 2014/12/27 16:18:50 jmcneill Exp $
 #
 # Configuration info for Rockchip ARM Peripherals
 #
@@ -41,3 +41,6 @@
 
 # Memory parameters
 defparam opt_rockchip.h                        MEMSIZE
+
+# Debugging parameters
+defflag opt_rockchip.h                 ROCKCHIP_CLOCK_DEBUG
diff -r 77010335f6f5 -r 5e96a4286c64 sys/arch/arm/rockchip/obio.c
--- a/sys/arch/arm/rockchip/obio.c      Sat Dec 27 15:52:42 2014 +0000
+++ b/sys/arch/arm/rockchip/obio.c      Sat Dec 27 16:18:50 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: obio.c,v 1.2 2014/12/26 19:44:48 jmcneill Exp $        */
+/*     $NetBSD: obio.c,v 1.3 2014/12/27 16:18:50 jmcneill Exp $        */
 
 /*
  * Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -35,8 +35,10 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include "opt_rockchip.h"
+
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.2 2014/12/26 19:44:48 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.3 2014/12/27 16:18:50 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -66,6 +68,10 @@
 void   obio_init_gpio(void);
 void   obio_swporta(int, int, int);
 
+#ifdef ROCKCHIP_CLOCK_DEBUG
+static void    obio_dump_clocks(void);
+#endif
+
 /* there can be only one */
 bool   obio_found;
 
@@ -86,6 +92,10 @@
        aprint_naive("\n");
        aprint_normal(": On-board I/O\n");
 
+#ifdef ROCKCHIP_CLOCK_DEBUG
+       obio_dump_clocks();
+#endif
+
        obio_init_grf();
        obio_init_gpio();
 
@@ -208,3 +218,16 @@
 
        printf("gpio: 0x%08x 0x%08x -> 0x%08x\n", gpio_base + offset, old, renew);
 }
+
+#ifdef ROCKCHIP_CLOCK_DEBUG
+static void
+obio_dump_clocks(void)
+{
+       printf("APLL: %u Hz\n", rockchip_apll_get_rate());
+       printf("GPLL: %u Hz\n", rockchip_gpll_get_rate());
+       printf("CPU: %u Hz\n", rockchip_cpu_get_rate());
+       printf("AHB: %u Hz\n", rockchip_ahb_get_rate());
+       printf("A9PERIPH: %u Hz\n", rockchip_a9periph_get_rate());
+       printf("MMC0: %u Hz\n", rockchip_mmc0_get_rate());
+}
+#endif
diff -r 77010335f6f5 -r 5e96a4286c64 sys/arch/arm/rockchip/rockchip_board.c
--- a/sys/arch/arm/rockchip/rockchip_board.c    Sat Dec 27 15:52:42 2014 +0000
+++ b/sys/arch/arm/rockchip/rockchip_board.c    Sat Dec 27 16:18:50 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_board.c,v 1.3 2014/12/27 02:12:29 jmcneill Exp $ */
+/* $NetBSD: rockchip_board.c,v 1.4 2014/12/27 16:18:50 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -26,8 +26,10 @@
  * SUCH DAMAGE.
  */
 
+#include "opt_rockchip.h"
+
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.3 2014/12/27 02:12:29 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.4 2014/12/27 16:18:50 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -81,7 +83,13 @@
        no = __SHIFTOUT(pll_con0, CRU_PLL_CON0_CLKOD) + 1;
        nf = __SHIFTOUT(pll_con1, CRU_PLL_CON1_CLKF) + 1;
 
-       return ROCKCHIP_REF_FREQ * nf / (nr * no);
+#ifdef ROCKCHIP_CLOCK_DEBUG
+       printf("%s: %#x %#x: nr=%d no=%d nf=%d\n", __func__,
+           (unsigned int)con0_reg, (unsigned int)con1_reg,
+           nr, no, nf);
+#endif
+
+       return (ROCKCHIP_REF_FREQ * nf) / (nr * no);
 }
 
 u_int
@@ -102,15 +110,58 @@
        bus_space_tag_t bst = &rockchip_bs_tag;
        bus_space_handle_t bsh;
        uint32_t clksel_con0;
+       uint32_t a9_core_div_con;
+       u_int rate;
 
        rockchip_get_cru_bsh(&bsh);
 
        clksel_con0 = bus_space_read_4(bst, bsh, CRU_CLKSEL_CON_REG(0));
        if (clksel_con0 & CRU_CLKSEL_CON0_CPU_CLK_PLL_SEL) {
-               return rockchip_gpll_get_rate();
+               rate = rockchip_gpll_get_rate();
+       } else {
+               rate = rockchip_apll_get_rate();
+       }
+
+#if notyet
+       if (rockchip_chip_id() == ROCKCHIP_CHIP_ID_RK3188) {
+               a9_core_div_con = __SHIFTOUT(clksel_con0,
+                                    RK3188_CRU_CLKSEL_CON0_A9_CORE_DIV_CON);
        } else {
-               return rockchip_apll_get_rate();
+               a9_core_div_con = __SHIFTOUT(clksel_con0,
+                                    CRU_CLKSEL_CON0_A9_CORE_DIV_CON);
        }
+#else
+       a9_core_div_con = 0;
+#endif
+
+#ifdef ROCKCHIP_CLOCK_DEBUG
+       printf("%s: clksel_con0=%#x\n", __func__, clksel_con0);
+#endif
+
+       return rate / (a9_core_div_con + 1);
+}
+
+u_int
+rockchip_a9periph_get_rate(void)
+{
+       bus_space_tag_t bst = &rockchip_bs_tag;
+       bus_space_handle_t bsh;
+       uint32_t clksel_con0;
+       uint32_t core_peri_div_con;
+       u_int rate;
+
+       rockchip_get_cru_bsh(&bsh);
+
+       clksel_con0 = bus_space_read_4(bst, bsh, CRU_CLKSEL_CON_REG(0));
+       if (clksel_con0 & CRU_CLKSEL_CON0_CPU_CLK_PLL_SEL) {
+               rate = rockchip_gpll_get_rate();
+       } else {
+               rate = rockchip_apll_get_rate();
+       }
+       core_peri_div_con = __SHIFTOUT(clksel_con0,
+                                      CRU_CLKSEL_CON0_CORE_PERI_DIV_CON);
+
+       return rate / ((1 << core_peri_div_con) * 2);
 }
 
 u_int
@@ -132,3 +183,21 @@
 
        return rockchip_gpll_get_rate() / (hclk_div * aclk_div);
 }
+
+u_int
+rockchip_mmc0_get_rate(void)
+{
+       bus_space_tag_t bst = &rockchip_bs_tag;
+       bus_space_handle_t bsh;
+       uint32_t clksel_con11;
+       uint32_t mmc0_div_con;
+
+       rockchip_get_cru_bsh(&bsh);
+
+       clksel_con11 = bus_space_read_4(bst, bsh, CRU_CLKSEL_CON_REG(11));
+
+       mmc0_div_con = __SHIFTOUT(clksel_con11,
+                                 CRU_CLKSEL_CON11_MMC0_DIV_CON);
+
+       return rockchip_gpll_get_rate() / (mmc0_div_con + 1);
+}
diff -r 77010335f6f5 -r 5e96a4286c64 sys/arch/arm/rockchip/rockchip_crureg.h
--- a/sys/arch/arm/rockchip/rockchip_crureg.h   Sat Dec 27 15:52:42 2014 +0000
+++ b/sys/arch/arm/rockchip/rockchip_crureg.h   Sat Dec 27 16:18:50 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_crureg.h,v 1.2 2014/12/27 02:12:29 jmcneill Exp $ */
+/* $NetBSD: rockchip_crureg.h,v 1.3 2014/12/27 16:18:50 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -55,12 +55,12 @@
 #define CRU_GLB_CNT_TH_REG     0x0140
 
 #define CRU_PLL_CON0_CLKR_MASK __BITS(29,24)
-#define CRU_PLL_CON0_CLKOD_MASK        __BITS(19,16)
+#define CRU_PLL_CON0_CLKOD_MASK        __BITS(21,16)
 #define CRU_PLL_CON0_CLKR      __BITS(13,8)
-#define CRU_PLL_CON0_CLKOD     __BITS(3,0)
+#define CRU_PLL_CON0_CLKOD     __BITS(5,0)
 
-#define CRU_PLL_CON1_CLKF_MASK __BITS(28,16)
-#define CRU_PLL_CON1_CLKF      __BITS(12,0)
+#define CRU_PLL_CON1_CLKF_MASK __BITS(31,16)
+#define CRU_PLL_CON1_CLKF      __BITS(15,0)
 
 #define CRU_CLKSEL_CON0_CPU_CLK_PLL_SEL_MASK   __BIT(24)
 #define CRU_CLKSEL_CON0_CORE_PERI_DIV_CON_MASK __BITS(23,22)
@@ -68,6 +68,7 @@
 #define CRU_CLKSEL_CON0_CPU_CLK_PLL_SEL                __BIT(8)
 #define CRU_CLKSEL_CON0_CORE_PERI_DIV_CON      __BITS(7,6)
 #define CRU_CLKSEL_CON0_A9_CORE_DIV_CON                __BITS(4,0)
+#define RK3188_CRU_CLKSEL_CON0_A9_CORE_DIV_CON __BITS(13,9)
 
 #define CRU_CLKSEL_CON10_PERI_PLL_SEL_MASK     __BIT(31)
 #define CRU_CLKSEL_CON10_PERI_PCLK_DIV_CON_MASK        __BITS(29,28)
@@ -78,6 +79,9 @@
 #define CRU_CLKSEL_CON10_PERI_HCLK_DIV_CON     __BITS(9,8)
 #define CRU_CLKSEL_CON10_PERI_ACLK_DIV_CON     __BITS(4,0)
 
+#define CRU_CLKSEL_CON11_MMC0_DIV_CON_MASK     __BITS(21,16)
+#define CRU_CLKSEL_CON11_MMC0_DIV_CON          __BITS(5,0)
+
 #define CRU_GLB_SRST_FST_MAGIC 0xfdb9
 
 #endif /* !_ROCKCHIP_CRUREG_H */
diff -r 77010335f6f5 -r 5e96a4286c64 sys/arch/arm/rockchip/rockchip_var.h
--- a/sys/arch/arm/rockchip/rockchip_var.h      Sat Dec 27 15:52:42 2014 +0000
+++ b/sys/arch/arm/rockchip/rockchip_var.h      Sat Dec 27 16:18:50 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: rockchip_var.h,v 1.4 2014/12/27 02:12:29 jmcneill Exp $ */
+/* $NetBSD: rockchip_var.h,v 1.5 2014/12/27 16:18:50 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -32,6 +32,8 @@
 #ifndef _ARM_ROCKCHIP_ROCKCHIP_VAR_H_
 #define _ARM_ROCKCHIP_ROCKCHIP_VAR_H_
 
+#include "opt_rockchip.h"
+
 #include <sys/types.h>
 #include <sys/bus.h>
 
@@ -60,5 +62,7 @@
 u_int rockchip_gpll_get_rate(void);
 u_int rockchip_cpu_get_rate(void);
 u_int rockchip_ahb_get_rate(void);
+u_int rockchip_a9periph_get_rate(void);
+u_int rockchip_mmc0_get_rate(void);
 
 #endif /* _ARM_ROCKCHIP_ROCKCHIP_VAR_H_ */



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