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[src/trunk]: src/sys/arch/arm/arm Only set CPU_CONTROL_VECRELOC if ARM_HAS_VB...
details: https://anonhg.NetBSD.org/src/rev/f60a046cadeb
branches: trunk
changeset: 787444:f60a046cadeb
user: matt <matt%NetBSD.org@localhost>
date: Tue Jun 18 15:27:05 2013 +0000
description:
Only set CPU_CONTROL_VECRELOC if ARM_HAS_VBAR is not defined.
diffstat:
sys/arch/arm/arm/cpufunc.c | 30 ++++++++++++++++++++++++++++--
1 files changed, 28 insertions(+), 2 deletions(-)
diffs (161 lines):
diff -r a2f1432b241d -r f60a046cadeb sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c Tue Jun 18 15:23:18 2013 +0000
+++ b/sys/arch/arm/arm/cpufunc.c Tue Jun 18 15:27:05 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.122 2013/06/12 01:16:48 matt Exp $ */
+/* $NetBSD: cpufunc.c,v 1.123 2013/06/18 15:27:05 matt Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.122 2013/06/12 01:16:48 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.123 2013/06/18 15:27:05 matt Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -2794,8 +2794,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -2845,8 +2847,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -2899,8 +2903,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -2946,8 +2952,10 @@
cpuctrl = parse_cpu_options(args, arm11_options, cpuctrl);
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -2985,8 +2993,10 @@
cpuctrl |= (0x5 << 16) | (1 < 22);
cpuctrl |= CPU_CONTROL_XP_ENABLE;
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -3034,8 +3044,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -3091,8 +3103,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
auxctrl = 0;
auxctrl_wax = ~0;
@@ -3189,8 +3203,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -3252,8 +3268,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -3304,8 +3322,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -3355,8 +3375,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -3420,8 +3442,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
@@ -3500,8 +3524,10 @@
cpuctrl |= CPU_CONTROL_BEND_ENABLE;
#endif
+#ifndef ARM_HAS_VBAR
if (vector_page == ARM_VECTORS_HIGH)
cpuctrl |= CPU_CONTROL_VECRELOC;
+#endif
/* Clear out the cache */
cpu_idcache_wbinv_all();
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