Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/arch Trailing whitespace



details:   https://anonhg.NetBSD.org/src/rev/0a65b0d2fded
branches:  trunk
changeset: 824024:0a65b0d2fded
user:      skrll <skrll%NetBSD.org@localhost>
date:      Fri May 19 07:40:58 2017 +0000

description:
Trailing whitespace

diffstat:

 sys/arch/evbmips/ingenic/autoconf.c |   8 ++++----
 sys/arch/evbmips/ingenic/clock.c    |  12 ++++++------
 sys/arch/evbmips/ingenic/cpu.c      |   6 +++---
 sys/arch/evbmips/ingenic/machdep.c  |   8 ++++----
 sys/arch/evbmips/ingenic/mainbus.c  |   6 +++---
 sys/arch/mips/ingenic/apbus.c       |   8 ++++----
 sys/arch/mips/ingenic/ingenic_com.c |   8 ++++----
 sys/arch/mips/ingenic/ingenic_dme.c |   6 +++---
 sys/arch/mips/ingenic/jzfb_regs.h   |   4 ++--
 sys/arch/mips/ingenic/jziic.c       |  18 +++++++++---------
 10 files changed, 42 insertions(+), 42 deletions(-)

diffs (truncated from 349 to 300 lines):

diff -r 5ca01ad9d4a6 -r 0a65b0d2fded sys/arch/evbmips/ingenic/autoconf.c
--- a/sys/arch/evbmips/ingenic/autoconf.c       Fri May 19 07:30:24 2017 +0000
+++ b/sys/arch/evbmips/ingenic/autoconf.c       Fri May 19 07:40:58 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: autoconf.c,v 1.2 2015/10/08 17:51:15 macallan Exp $ */
+/* $NetBSD: autoconf.c,v 1.3 2017/05/19 07:40:58 skrll Exp $ */
 
 /*-
  * Copyright (c) 2001 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.2 2015/10/08 17:51:15 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.3 2017/05/19 07:40:58 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -46,7 +46,7 @@
 
 /*
  * Configure all devices on system
- */     
+ */
 void
 cpu_configure(void)
 {
@@ -72,7 +72,7 @@
        if (device_is_a(dev, "dme") && have_enaddr) {
                prop_dictionary_t dict;
                prop_data_t blob;
-               
+
                dict = device_properties(dev);
 
                blob = prop_data_create_data(enaddr, ETHER_ADDR_LEN);
diff -r 5ca01ad9d4a6 -r 0a65b0d2fded sys/arch/evbmips/ingenic/clock.c
--- a/sys/arch/evbmips/ingenic/clock.c  Fri May 19 07:30:24 2017 +0000
+++ b/sys/arch/evbmips/ingenic/clock.c  Fri May 19 07:40:58 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: clock.c,v 1.8 2016/08/26 15:45:48 skrll Exp $ */
+/*     $NetBSD: clock.c,v 1.9 2017/05/19 07:40:58 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 Michael Lorenz
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.8 2016/08/26 15:45:48 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.9 2017/05/19 07:40:58 skrll Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -87,7 +87,7 @@
         * that to work yet ( all I get is INT0 which is for hardware interrupts
         * in general )
         * So if we can get OST to fire on INT2 we can just block INT0 on core1
-        * and have a timer interrupt on both cores, if not the regular timer 
+        * and have a timer interrupt on both cores, if not the regular timer
         * would be more convenient but we'd have to shoot an IPI to core1 on
         * every tick.
         * For now, use OST and hope we'll figure out how to make it fire on
@@ -129,7 +129,7 @@
        printf("cnt5: %08x\n", readreg(JZ_TC_TCNT(5)));
        printf("CR: %08x\n", MFC0(MIPS_COP_0_CAUSE, 0));
        printf("SR: %08x\n", MFC0(MIPS_COP_0_STATUS, 0));
-       
+
        printf("INTC %08x %08x\n", readreg(JZ_ICSR0), readreg(JZ_ICSR1));
        delay(3000000);
        printf("%s %d\n", __func__, MFC0(12, 3));
@@ -209,8 +209,8 @@
        /* Check for lost clock interrupts */
        new_cnt = readreg(JZ_OST_CNT_LO);
 
-       /* 
-        * Missed one or more clock interrupts, so let's start 
+       /*
+        * Missed one or more clock interrupts, so let's start
         * counting again from the current value.
         */
        if ((ci->ci_next_cp0_clk_intr - new_cnt) & 0x80000000) {
diff -r 5ca01ad9d4a6 -r 0a65b0d2fded sys/arch/evbmips/ingenic/cpu.c
--- a/sys/arch/evbmips/ingenic/cpu.c    Fri May 19 07:30:24 2017 +0000
+++ b/sys/arch/evbmips/ingenic/cpu.c    Fri May 19 07:40:58 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.2 2016/08/26 13:54:18 skrll Exp $    */
+/*     $NetBSD: cpu.c,v 1.3 2017/05/19 07:40:58 skrll Exp $    */
 
 /*
  * Copyright 2002 Wasabi Systems, Inc.
@@ -36,7 +36,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.2 2016/08/26 13:54:18 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.3 2017/05/19 07:40:58 skrll Exp $");
 
 #include "opt_ingenic.h"
 #include "opt_multiprocessor.h"
@@ -79,7 +79,7 @@
 #ifdef MULTIPROCESSOR
                uint32_t vec, reg;
                int bail = 10000;
-               
+
                startup_cpu_info = cpu_info_alloc(NULL, unit, 0, unit, 0);
                startup_cpu_info->ci_cpu_freq = ci->ci_cpu_freq;
                ci = startup_cpu_info;
diff -r 5ca01ad9d4a6 -r 0a65b0d2fded sys/arch/evbmips/ingenic/machdep.c
--- a/sys/arch/evbmips/ingenic/machdep.c        Fri May 19 07:30:24 2017 +0000
+++ b/sys/arch/evbmips/ingenic/machdep.c        Fri May 19 07:40:58 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: machdep.c,v 1.12 2016/12/22 14:47:57 cherry Exp $ */
+/*     $NetBSD: machdep.c,v 1.13 2017/05/19 07:40:58 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 Michael Lorenz
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.12 2016/12/22 14:47:57 cherry Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.13 2017/05/19 07:40:58 skrll Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
@@ -97,7 +97,7 @@
         */
        curcpu()->ci_cpu_freq = 1200000000;     /* for now */
        cntfreq = 12000000;     /* EXTCLK / 4 */
-       
+
        curcpu()->ci_cctr_freq = cntfreq;
        curcpu()->ci_cycles_per_hz = (cntfreq + hz / 2) / hz;
 
@@ -350,5 +350,5 @@
        writereg(JZ_WDOG_TCNT, 0);      /* reset counter */
        writereg(JZ_WDOG_TDR, 128);     /* wait for ~1s */
        writereg(JZ_WDOG_TCSR, TCSR_RTC_EN | TCSR_DIV_256);
-       writereg(JZ_WDOG_TCER, TCER_ENABLE);    /* fire! */     
+       writereg(JZ_WDOG_TCER, TCER_ENABLE);    /* fire! */
 }
diff -r 5ca01ad9d4a6 -r 0a65b0d2fded sys/arch/evbmips/ingenic/mainbus.c
--- a/sys/arch/evbmips/ingenic/mainbus.c        Fri May 19 07:30:24 2017 +0000
+++ b/sys/arch/evbmips/ingenic/mainbus.c        Fri May 19 07:40:58 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mainbus.c,v 1.5 2016/01/29 01:54:14 macallan Exp $ */
+/*     $NetBSD: mainbus.c,v 1.6 2017/05/19 07:40:58 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 Michael Lorenz
@@ -25,9 +25,9 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.5 2016/01/29 01:54:14 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.6 2017/05/19 07:40:58 skrll Exp $");
 
 #include "opt_multiprocessor.h"
 
diff -r 5ca01ad9d4a6 -r 0a65b0d2fded sys/arch/mips/ingenic/apbus.c
--- a/sys/arch/mips/ingenic/apbus.c     Fri May 19 07:30:24 2017 +0000
+++ b/sys/arch/mips/ingenic/apbus.c     Fri May 19 07:40:58 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: apbus.c,v 1.18 2015/10/08 17:54:30 macallan Exp $ */
+/*     $NetBSD: apbus.c,v 1.19 2017/05/19 07:43:31 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 Michael Lorenz
@@ -25,11 +25,11 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
- 
+
 /* catch-all for on-chip peripherals */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.18 2015/10/08 17:54:30 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: apbus.c,v 1.19 2017/05/19 07:43:31 skrll Exp $");
 
 #include "locators.h"
 #define        _MIPS_BUS_DMA_PRIVATE
@@ -264,7 +264,7 @@
                        reg &= ~adv->clk1;
                        writereg(JZ_CLKGR1, reg);
                }
-       
+
                (void) config_found_ia(self, "apbus", &aa, apbus_print);
        }
 }
diff -r 5ca01ad9d4a6 -r 0a65b0d2fded sys/arch/mips/ingenic/ingenic_com.c
--- a/sys/arch/mips/ingenic/ingenic_com.c       Fri May 19 07:30:24 2017 +0000
+++ b/sys/arch/mips/ingenic/ingenic_com.c       Fri May 19 07:40:58 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ingenic_com.c,v 1.5 2015/07/11 19:00:04 macallan Exp $ */
+/*     $NetBSD: ingenic_com.c,v 1.6 2017/05/19 07:43:31 skrll Exp $ */
 
 /*-
  * Copyright (c) 2014 Michael Lorenz
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ingenic_com.c,v 1.5 2015/07/11 19:00:04 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ingenic_com.c,v 1.6 2017/05/19 07:43:31 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -112,7 +112,7 @@
                com0addr[com_lctl] = htole32(LCR_8BITS);        /* XXX */
                com0addr[com_mcr]  = htole32(MCR_DTR|MCR_RTS);
                com0addr[com_fifo] = htole32(
-                   FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | 
+                   FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST |
                    FIFO_TRIGGER_1 | FIFO_UART_ON);
 #if 0
        }
@@ -149,7 +149,7 @@
 ingenic_com_cnattach(void)
 {
        int i;
-       
+
        bus_space_map(apbus_memt, JZ_UART0, 0x100, 0, &regh);
        cons_com = JZ_UART0;
        memset(&regs, 0, sizeof(regs));
diff -r 5ca01ad9d4a6 -r 0a65b0d2fded sys/arch/mips/ingenic/ingenic_dme.c
--- a/sys/arch/mips/ingenic/ingenic_dme.c       Fri May 19 07:30:24 2017 +0000
+++ b/sys/arch/mips/ingenic/ingenic_dme.c       Fri May 19 07:40:58 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: ingenic_dme.c,v 1.2 2015/10/08 17:55:58 macallan Exp $ */
+/*     $NetBSD: ingenic_dme.c,v 1.3 2017/05/19 07:43:31 skrll Exp $ */
 
 /*-
  * Copyright (c) 2015 Michael Lorenz
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ingenic_dme.c,v 1.2 2015/10/08 17:55:58 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ingenic_dme.c,v 1.3 2017/05/19 07:43:31 skrll Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -160,7 +160,7 @@
 static int
 ingenic_dme_intr(void *arg)
 {
-       uint32_t reg;   
+       uint32_t reg;
        int ret = 0;
 
        /* see if it's us */
diff -r 5ca01ad9d4a6 -r 0a65b0d2fded sys/arch/mips/ingenic/jzfb_regs.h
--- a/sys/arch/mips/ingenic/jzfb_regs.h Fri May 19 07:30:24 2017 +0000
+++ b/sys/arch/mips/ingenic/jzfb_regs.h Fri May 19 07:40:58 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: jzfb_regs.h,v 1.1 2016/04/07 01:00:05 macallan Exp $ */
+/*     $NetBSD: jzfb_regs.h,v 1.2 2017/05/19 07:43:31 skrll Exp $ */
 
 /*-
  * Copyright (c) 2015 Michael Lorenz
@@ -86,4 +86,4 @@
 #define JZ_LCDENH_GAMMA                0x0800
 #define JZ_LCDENH_VEE          0x1000
 
-#endif /* JZFB_REGS_H */
\ No newline at end of file
+#endif /* JZFB_REGS_H */
diff -r 5ca01ad9d4a6 -r 0a65b0d2fded sys/arch/mips/ingenic/jziic.c
--- a/sys/arch/mips/ingenic/jziic.c     Fri May 19 07:30:24 2017 +0000
+++ b/sys/arch/mips/ingenic/jziic.c     Fri May 19 07:40:58 2017 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: jziic.c,v 1.3 2015/12/14 23:21:23 macallan Exp $ */
+/*     $NetBSD: jziic.c,v 1.4 2017/05/19 07:43:31 skrll Exp $ */
 
 /*-
  * Copyright (c) 2015 Michael Lorenz
@@ -27,12 +27,12 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: jziic.c,v 1.3 2015/12/14 23:21:23 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: jziic.c,v 1.4 2017/05/19 07:43:31 skrll Exp $");
 
 /*
  * a preliminary driver for JZ4780's on-chip SMBus controllers
  * - needs more error handling and interrupt support
- * - transfers can't be more than the chip's FIFO, supposedly 16 bytes per 
+ * - transfers can't be more than the chip's FIFO, supposedly 16 bytes per
  *   direction
  * so, good enough for RTCs but not much else yet
  */



Home | Main Index | Thread Index | Old Index