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[src/trunk]: src/sys/arch/evbarm/beagle Add SDRC to devmap.



details:   https://anonhg.NetBSD.org/src/rev/2dddae11c4f2
branches:  trunk
changeset: 783275:2dddae11c4f2
user:      matt <matt%NetBSD.org@localhost>
date:      Thu Dec 13 01:16:39 2012 +0000

description:
Add SDRC to devmap.
Use SDRC to determine RAM size on OMAP3xxx.

diffstat:

 sys/arch/evbarm/beagle/beagle.h         |   9 ++++-
 sys/arch/evbarm/beagle/beagle_machdep.c |  48 +++++++++++++++++++++++++++++---
 sys/arch/evbarm/beagle/beagle_start.S   |  19 +++++++++++--
 3 files changed, 66 insertions(+), 10 deletions(-)

diffs (188 lines):

diff -r dc915ed6118b -r 2dddae11c4f2 sys/arch/evbarm/beagle/beagle.h
--- a/sys/arch/evbarm/beagle/beagle.h   Thu Dec 13 01:15:50 2012 +0000
+++ b/sys/arch/evbarm/beagle/beagle.h   Thu Dec 13 01:16:39 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: beagle.h,v 1.8 2012/12/11 01:54:43 khorben Exp $       */
+/*     $NetBSD: beagle.h,v 1.9 2012/12/13 01:16:39 matt Exp $  */
 /*
  * Copyright (c) 2007 Microsoft
  * All rights reserved.
@@ -47,6 +47,8 @@
 #define OMAP_L4_PERIPHERAL_SIZE                OMAP3430_L4_PERIPHERAL_SIZE
 #define OMAP_L4_WAKEUP_BASE            OMAP3430_L4_WAKEUP_BASE
 #define OMAP_L4_WAKEUP_SIZE            OMAP3430_L4_WAKEUP_SIZE
+#define OMAP_SDRC_BASE                 OMAP3530_SDRC_BASE
+#define OMAP_SDRC_SIZE                 OMAP3530_SDRC_SIZE
 #endif
 
 #ifdef OMAP_3530
@@ -56,6 +58,8 @@
 #define OMAP_L4_PERIPHERAL_SIZE                OMAP3530_L4_PERIPHERAL_SIZE
 #define OMAP_L4_WAKEUP_BASE            OMAP3530_L4_WAKEUP_BASE
 #define OMAP_L4_WAKEUP_SIZE            OMAP3530_L4_WAKEUP_SIZE
+#define OMAP_SDRC_BASE                 OMAP3530_SDRC_BASE
+#define OMAP_SDRC_SIZE                 OMAP3530_SDRC_SIZE
 #endif
 
 #ifdef OMAP_4430
@@ -95,7 +99,8 @@
 #define OMAP_L4_CORE_VBASE     OMAP_KERNEL_IO_VBASE
 #define OMAP_L4_PERIPHERAL_VBASE       (OMAP_L4_CORE_VBASE + OMAP_L4_CORE_SIZE)
 #define OMAP_L4_WAKEUP_VBASE   (OMAP_L4_PERIPHERAL_VBASE + OMAP_L4_PERIPHERAL_SIZE)
-#define OMAP_KERNEL_IO_VEND    (OMAP_L4_WAKEUP_VBASE + OMAP_L4_WAKEUP_SIZE)
+#define OMAP_SDRC_VBASE                (OMAP_L4_WAKEUP_VBASE + OMAP_L4_WAKEUP_SIZE)
+#define OMAP_KERNEL_IO_VEND    (OMAP_SDRC_VBASE + OMAP_SDRC_SIZE)
 #define CONSADDR_VA    ((CONSADDR - OMAP_L4_PERIPHERAL_BASE) + OMAP_L4_PERIPHERAL_VBASE)
 #elif defined(OMAP_4430)
 #define OMAP_L4_CORE_VBASE     OMAP_KERNEL_IO_VBASE
diff -r dc915ed6118b -r 2dddae11c4f2 sys/arch/evbarm/beagle/beagle_machdep.c
--- a/sys/arch/evbarm/beagle/beagle_machdep.c   Thu Dec 13 01:15:50 2012 +0000
+++ b/sys/arch/evbarm/beagle/beagle_machdep.c   Thu Dec 13 01:16:39 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: beagle_machdep.c,v 1.27 2012/12/12 15:20:44 matt Exp $ */
+/*     $NetBSD: beagle_machdep.c,v 1.28 2012/12/13 01:16:39 matt Exp $ */
 
 /*
  * Machine dependent functions for kernel setup for TI OSK5912 board.
@@ -125,7 +125,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.27 2012/12/12 15:20:44 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.28 2012/12/13 01:16:39 matt Exp $");
 
 #include "opt_machdep.h"
 #include "opt_ddb.h"
@@ -221,6 +221,10 @@
 static void am335x_cpu_clk(void);
 #endif
 
+#if defined(OMAP_3530) || defined(OMAP_3430)
+static psize_t omap3530_memprobe(void);
+#endif
+
 bs_protos(bs_notimpl);
 
 #include "com.h"
@@ -311,6 +315,18 @@
                .pd_cache = PTE_NOCACHE
        },
 #endif
+#ifdef OMAP_SDRC_BASE
+       {
+               /*
+                * Map SDRAM Controller (SDRC) registers
+                */
+               .pd_va = _A(OMAP_SDRC_VBASE),
+               .pd_pa = _A(OMAP_SDRC_BASE),
+               .pd_size = _S(OMAP_SDRC_SIZE),
+               .pd_prot = VM_PROT_READ|VM_PROT_WRITE,
+               .pd_cache = PTE_NOCACHE,
+       },
+#endif
        {0}
 };
 
@@ -367,6 +383,7 @@
 u_int
 initarm(void *arg)
 {
+       psize_t ram_size;
 #if 1
        beagle_putchar('d');
 #endif
@@ -423,14 +440,18 @@
         * Set up the variables that define the availability of physical
         * memory.
         */
-#define        MEMSIZE_BYTES   (MEMSIZE * 1024 * 1024)
+#if defined(OMAP_3530) || defined(OMAP_3430)
+       ram_size = omap3530_memprobe();
+#else
+       ram_size = MEMSIZE * 1024 * 1024;
+#endif
 
        /* Fake bootconfig structure for the benefit of pmap.c. */
        bootconfig.dramblocks = 1;
        bootconfig.dram[0].address = KERNEL_BASE_PHYS & -0x400000;
-       bootconfig.dram[0].pages = MEMSIZE_BYTES;
+       bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
 
-       arm32_bootmem_init(bootconfig.dram[0].address, MEMSIZE_BYTES,
+       arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
            KERNEL_BASE_PHYS);
        arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap, true);
 
@@ -619,6 +640,23 @@
 }
 #endif
 
+#if defined(OMAP_3530) || defined(OMAP_3430)
+#define SDRC_MCFG(p)           (0x80 + (0x30 * (p)))
+#define SDRC_MCFG_MEMSIZE(m)   ((((m) & __BITS(8,17)) >> 8) * 2)
+static psize_t 
+omap3530_memprobe(void)
+{
+       const vaddr_t gpmc_base = OMAP_SDRC_VBASE;
+       const uint32_t mcfg0 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(0));
+       const uint32_t mcfg1 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(1));
+
+       printf("mcfg0 = %#x, size %lld\n", mcfg0, SDRC_MCFG_MEMSIZE(mcfg0));
+       printf("mcfg1 = %#x, size %lld\n", mcfg1, SDRC_MCFG_MEMSIZE(mcfg1));
+
+       return (SDRC_MCFG_MEMSIZE(mcfg0) + SDRC_MCFG_MEMSIZE(mcfg1)) * 1024 * 1024;
+}
+#endif
+
 void
 beagle_device_register(device_t self, void *aux)
 {
diff -r dc915ed6118b -r 2dddae11c4f2 sys/arch/evbarm/beagle/beagle_start.S
--- a/sys/arch/evbarm/beagle/beagle_start.S     Thu Dec 13 01:15:50 2012 +0000
+++ b/sys/arch/evbarm/beagle/beagle_start.S     Thu Dec 13 01:16:39 2012 +0000
@@ -92,7 +92,13 @@
 #include <arm/omap/omap2_obioreg.h>
 #include <evbarm/beagle/beagle.h>  
 
-RCSID("$NetBSD: beagle_start.S,v 1.11 2012/09/05 00:06:21 matt Exp $")
+#ifdef MEMSIZE
+#define INIT_MEMSIZE   MEMSIZE
+#else
+#define INIT_MEMSIZE   128
+#endif
+
+RCSID("$NetBSD: beagle_start.S,v 1.12 2012/12/13 01:16:39 matt Exp $")
 
 #define Invalidate_I_cache(reg) \
        mcr     p15, 0, reg, c7, c5, 0  /* Invalidate Entire I cache */
@@ -225,7 +231,7 @@
        .word   L1_S_FRAME
 Ltemp_l1_table:
        /* Put the temporary L1 translation table at the end of SDRAM. */
-       .word   0x80000000 + MEMSIZE * 0x100000 - L1_TABLE_SIZE
+       .word   0x80000000 + INIT_MEMSIZE * 0x100000 - L1_TABLE_SIZE
 
 /*
  * Coprocessor register initialization values
@@ -270,7 +276,7 @@
 mmu_init_table:
        /* Map KERNEL_BASE VA to SDRAM PA, write-back cacheable */
        MMU_INIT(KERNEL_BASE, KERNEL_BASE,
-               (MEMSIZE * L1_S_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+               (INIT_MEMSIZE * L1_S_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
                L1_S_PROTO | L1_S_APv7_KRW | L1_S_B | L1_S_C)
 
        /* Map first 1MB of L4 CORE (so console will work) */
@@ -297,5 +303,12 @@
                L1_S_PROTO | L1_S_APv7_KRW)
 #endif
 
+#ifdef OMAP_SDRC_BASE
+       /* Map 64KB SDRAM Controller (SDRC) */
+       MMU_INIT(OMAP_SDRC_VBASE, OMAP_SDRC_BASE,
+               (OMAP_SDRC_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
+               L1_S_PROTO | L1_S_APv7_KRW)
+#endif
+
        /* end of table */
        MMU_INIT(0, 0, 0, 0)



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