[src/trunk]: src/sys/arch/sh3/sh3 Fix fallouts in rev 1.19:

[tsutsui <tsutsui%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ee26b50f8125
branches:  trunk
changeset: 783247:ee26b50f8125
user:      tsutsui <tsutsui%NetBSD.org@localhost>
date:      Wed Dec 12 13:34:49 2012 +0000

description:
Fix fallouts in rev 1.19:
 http://www.nerv.org/~ryo/netbsd/netbsd/?q=id:20080316T191753Z.1654448ada03ce3c4668f3fe472796d0b771e147
 - revert RUN_P1 -> PAD_P1_SWITCH changes where RUN_P1 is
   actually required  (all icache CCIA ops still need RUN_P2)
 - sh4_dcache_wbinv_all() and sh4_dcache_wbinv_range_index()
   (which manipulate CCDA arrays) are no longer have RUN_P2 so
   we can't call them directly from sh4_icache_sync_all() and
   sh4_icache_sync_range_index() funcitons;  use function pointers
   (which have appropriate addresses) instead for 7750 and 7750S

diffstat:

 sys/arch/sh3/sh3/cache_sh4.c |  20 +++++++++++---------
 1 files changed, 11 insertions(+), 9 deletions(-)

diffs (82 lines):

diff -r 7830d3cd07f6 -r ee26b50f8125 sys/arch/sh3/sh3/cache_sh4.c
--- a/sys/arch/sh3/sh3/cache_sh4.c      Wed Dec 12 13:32:37 2012 +0000
+++ b/sys/arch/sh3/sh3/cache_sh4.c      Wed Dec 12 13:34:49 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cache_sh4.c,v 1.20 2008/04/28 20:23:35 martin Exp $    */
+/*     $NetBSD: cache_sh4.c,v 1.21 2012/12/12 13:34:49 tsutsui Exp $   */
 
 /*-
  * Copyright (c) 2002 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cache_sh4.c,v 1.20 2008/04/28 20:23:35 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache_sh4.c,v 1.21 2012/12/12 13:34:49 tsutsui Exp $");
 
 #include "opt_cache.h"
 
@@ -222,14 +222,15 @@
        vaddr_t va = 0;
        vaddr_t eva = SH4_ICACHE_SIZE;
 
-       sh4_dcache_wbinv_all();
+       /* d$ index ops must be called via P2 on 7750 and 7750S */
+       (*sh_cache_ops._dcache_wbinv_all)();
 
        RUN_P2;
        while (va < eva) {
                cache_sh4_op_8lines_32(va, SH4_CCIA, CCIA_ENTRY_MASK, CCIA_V);
                va += 32 * 8;
        }
-       PAD_P1_SWITCH;
+       RUN_P1;
 }
 
 void
@@ -248,7 +249,7 @@
                _reg_write_4(ccia, va & CCIA_TAGADDR_MASK); /* V = 0 */
                va += 32;
        }
-       PAD_P1_SWITCH;
+       RUN_P1;
 }
 
 void
@@ -257,7 +258,8 @@
        vaddr_t eva = round_line(va + sz);
        va = trunc_line(va);
 
-       sh4_dcache_wbinv_range_index(va, eva - va);
+       /* d$ index ops must be called via P2 on 7750 and 7750S */
+       (*sh_cache_ops._dcache_wbinv_range_index)(va, eva - va);
 
        RUN_P2;
        while ((eva - va) >= (8 * 32)) {
@@ -269,7 +271,7 @@
                cache_sh4_op_line_32(va, SH4_CCIA, CCIA_ENTRY_MASK, CCIA_V);
                va += 32;
        }
-       PAD_P1_SWITCH;
+       RUN_P1;
 }
 
 void
@@ -419,7 +421,7 @@
                    CCIA_V, 13);
                va += 32 * 8;
        }
-       PAD_P1_SWITCH;
+       RUN_P1;
 }
 
 void
@@ -442,7 +444,7 @@
                    CCIA_V, 13);
                va += 32;
        }
-       PAD_P1_SWITCH;
+       RUN_P1;
 }
 
 void