[src/trunk]: src/sys/arch/arm/allwinner Add more nand #define's

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/b59765bfa082
branches:  trunk
changeset: 789796:b59765bfa082
user:      matt <matt%NetBSD.org@localhost>
date:      Sun Sep 08 01:29:42 2013 +0000

description:
Add more nand #define's

diffstat:

 sys/arch/arm/allwinner/awin_reg.h |  23 +++++++++++++++++++----
 1 files changed, 19 insertions(+), 4 deletions(-)

diffs (40 lines):

diff -r eac3fd074a66 -r b59765bfa082 sys/arch/arm/allwinner/awin_reg.h
--- a/sys/arch/arm/allwinner/awin_reg.h Sun Sep 08 01:01:33 2013 +0000
+++ b/sys/arch/arm/allwinner/awin_reg.h Sun Sep 08 01:29:42 2013 +0000
@@ -303,6 +303,22 @@
 #define AWIN_NFC_WRITE_CMD_SET_RANDOM_CMD0     __BITS(15,8)
 #define AWIN_NFC_WRITE_CMD_SET_CMD     __BITS(7,0)
 
+#define AWIN_ECC_CTL_RANDOM_SEED       __BITS(31,16)
+#define AWIN_ECC_CTL_MODE              __BITS(15,12)
+#define AWIN_ECC_CTL_MODE_16BITS       0
+#define AWIN_ECC_CTL_MODE_24BITS       1
+#define AWIN_ECC_CTL_MODE_28BITS       2
+#define AWIN_ECC_CTL_MODE_32BITS       3
+#define AWIN_ECC_CTL_MODE_40BITS       4
+#define AWIN_ECC_CTL_MODE_48BITS       5
+#define AWIN_ECC_CTL_MODE_56BITS       6
+#define AWIN_ECC_CTL_MODE_60BITS       7
+#define AWIN_ECC_CTL_MODE_64BITS       8
+#define AWIN_ECC_CTL_RANDOM_DIR                __BIT(10)
+#define AWIN_ECC_CTL_RANDOM            __BIT(9)
+#define AWIN_ECC_CTL_BLOCK_SIZE                __BIT(5)
+#define AWIN_ECC_CTL_EXCEPTION         __BIT(4)
+#define AWIN_ECC_CTL_PIPELINE                  __BIT(3)
 #define AWIN_ECC_CTL_EN                        __BIT(0)
 
 #define AWIN_EMAC_CTL_REG              0x0000
@@ -375,10 +391,9 @@
 #define AWIN_AHCI_IDR_REG              0x00FC
 #define AWIN_AHCI_RWCR_REG             0x00FC
 
-#define AWIN_AHCI_P0DMACR_REG          0x0170
-#define AWIN_AHCI_P0PHYCR_REG          0x0178
-#define AWIN_AHCI_P0PHYSR_REG          0x017C
-
+#define AWIN_AHCI_P0DMACR_REG          0x0170
+#define AWIN_AHCI_P0PHYCR_REG          0x0178
+#define AWIN_AHCI_P0PHYSR_REG          0x017C
 
 #define AWIN_PLL1_CFG_REG              0x0000
 #define AWIN_PLL1_TUN_REG              0x0004