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[src/trunk]: src/sys/arch/arm/fdt Don't allow sharing edge and level triggere...
details: https://anonhg.NetBSD.org/src/rev/0e0ca691c000
branches: trunk
changeset: 825085:0e0ca691c000
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Thu Jun 29 20:54:28 2017 +0000
description:
Don't allow sharing edge and level triggered interrupts.
diffstat:
sys/arch/arm/fdt/gic_fdt.c | 10 ++++++++--
1 files changed, 8 insertions(+), 2 deletions(-)
diffs (45 lines):
diff -r 85042f11d4b4 -r 0e0ca691c000 sys/arch/arm/fdt/gic_fdt.c
--- a/sys/arch/arm/fdt/gic_fdt.c Thu Jun 29 20:54:03 2017 +0000
+++ b/sys/arch/arm/fdt/gic_fdt.c Thu Jun 29 20:54:28 2017 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: gic_fdt.c,v 1.5 2017/06/28 23:49:29 jmcneill Exp $ */
+/* $NetBSD: gic_fdt.c,v 1.6 2017/06/29 20:54:28 jmcneill Exp $ */
/*-
* Copyright (c) 2015-2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gic_fdt.c,v 1.5 2017/06/28 23:49:29 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gic_fdt.c,v 1.6 2017/06/29 20:54:28 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -77,6 +77,7 @@
void *intr_ih;
int intr_refcnt;
int intr_ipl;
+ int intr_level;
TAILQ_HEAD(, gic_fdt_irqhandler) intr_handlers;
};
@@ -183,6 +184,7 @@
firq->intr_sc = sc;
firq->intr_refcnt = 0;
firq->intr_ipl = ipl;
+ firq->intr_level = level;
TAILQ_INIT(&firq->intr_handlers);
firq->intr_ih = intr_establish(irq, ipl, level | IST_MPSAFE,
gic_fdt_intr, firq);
@@ -197,6 +199,10 @@
device_printf(dev, "cannot share irq with different ipl\n");
return NULL;
}
+ if (firq->intr_level != level) {
+ device_printf(dev, "cannot share edge and level interrupts\n");
+ return NULL;
+ }
firq->intr_refcnt++;
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