[src/trunk]: src/sys/dev/pci PME# clock is not bit 2 but bit 3. Use the macro!

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/deefd7a02a49
branches:  trunk
changeset: 796180:deefd7a02a49
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Fri May 23 17:54:08 2014 +0000

description:
PME# clock is not bit 2 but bit 3. Use the macro!

diffstat:

 sys/dev/pci/pci_subr.c |  6 +++---
 sys/dev/pci/pcireg.h   |  3 ++-
 2 files changed, 5 insertions(+), 4 deletions(-)

diffs (44 lines):

diff -r 25979445ce3a -r deefd7a02a49 sys/dev/pci/pci_subr.c
--- a/sys/dev/pci/pci_subr.c    Fri May 23 16:57:42 2014 +0000
+++ b/sys/dev/pci/pci_subr.c    Fri May 23 17:54:08 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pci_subr.c,v 1.112 2014/05/15 06:58:19 msaitoh Exp $   */
+/*     $NetBSD: pci_subr.c,v 1.113 2014/05/23 17:54:08 msaitoh Exp $   */
 
 /*
  * Copyright (c) 1997 Zubin D. Dittia.  All rights reserved.
@@ -40,7 +40,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.112 2014/05/15 06:58:19 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.113 2014/05/23 17:54:08 msaitoh Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_pci.h"
@@ -1411,7 +1411,7 @@
        printf("    Capabilities register: 0x%04x\n", caps);
        printf("      Version: %s\n",
            pci_conf_print_pcipm_cap_pmrev(caps & 0x3));
-       onoff("PME# clock", caps, 0x4);
+       onoff("PME# clock", caps, PCI_PMCR_PME_CLOCK);
        onoff("Device specific initialization", caps, 0x20);
        printf("      3.3V auxiliary current: %s\n",
            pci_conf_print_pcipm_cap_aux(caps));
diff -r 25979445ce3a -r deefd7a02a49 sys/dev/pci/pcireg.h
--- a/sys/dev/pci/pcireg.h      Fri May 23 16:57:42 2014 +0000
+++ b/sys/dev/pci/pcireg.h      Fri May 23 17:54:08 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pcireg.h,v 1.87 2014/05/23 06:18:54 msaitoh Exp $      */
+/*     $NetBSD: pcireg.h,v 1.88 2014/05/23 17:54:08 msaitoh Exp $      */
 
 /*
  * Copyright (c) 1995, 1996, 1999, 2000
@@ -479,6 +479,7 @@
 /* Power Management Capability Register */
 #define PCI_PMCR_SHIFT         16
 #define PCI_PMCR               0x02
+#define PCI_PMCR_PME_CLOCK     0x0008
 #define PCI_PMCR_D1SUPP                0x0200
 #define PCI_PMCR_D2SUPP                0x0400
 /* Power Management Control Status Register */