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[src/trunk]: src/sys/arch Do not use Early Write Acknowledge for PCIe I/O and...
details: https://anonhg.NetBSD.org/src/rev/b4bef06be9d8
branches: trunk
changeset: 847580:b4bef06be9d8
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sat Dec 28 17:19:43 2019 +0000
description:
Do not use Early Write Acknowledge for PCIe I/O and config space.
diffstat:
sys/arch/aarch64/aarch64/bus_space.c | 6 ++++--
sys/arch/aarch64/aarch64/genassym.cf | 3 ++-
sys/arch/aarch64/aarch64/locore.S | 10 ++++++----
sys/arch/aarch64/aarch64/pmap.c | 9 ++++++---
sys/arch/aarch64/conf/files.aarch64 | 4 ++--
sys/arch/aarch64/include/pmap.h | 8 ++++++--
sys/arch/arm/acpi/acpi_machdep.c | 20 +++++++++++++++++---
sys/arch/arm/acpi/acpipchb.c | 15 ++++++++++++---
sys/arch/arm/fdt/pcihost_fdt.c | 14 +++++++++++---
sys/arch/arm/fdt/pcihost_fdtvar.h | 4 +++-
sys/arch/arm/include/bus_defs.h | 9 ++++++++-
sys/arch/arm/nvidia/tegra_pcie.c | 11 ++++++-----
sys/arch/arm/rockchip/rk3399_pcie.c | 9 +++++----
13 files changed, 88 insertions(+), 34 deletions(-)
diffs (truncated from 436 to 300 lines):
diff -r fe3805f52c2b -r b4bef06be9d8 sys/arch/aarch64/aarch64/bus_space.c
--- a/sys/arch/aarch64/aarch64/bus_space.c Sat Dec 28 16:07:41 2019 +0000
+++ b/sys/arch/aarch64/aarch64/bus_space.c Sat Dec 28 17:19:43 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bus_space.c,v 1.8 2019/01/27 02:08:36 pgoyette Exp $ */
+/* $NetBSD: bus_space.c,v 1.9 2019/12/28 17:19:43 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.8 2019/01/27 02:08:36 pgoyette Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bus_space.c,v 1.9 2019/12/28 17:19:43 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -561,6 +561,8 @@
pmapflags = PMAP_WRITE_COMBINE;
else if ((flag & BUS_SPACE_MAP_CACHEABLE) != 0)
pmapflags = PMAP_WRITE_BACK;
+ else if ((flag & _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED) != 0)
+ pmapflags = PMAP_DEV_SO;
else
pmapflags = PMAP_DEV;
diff -r fe3805f52c2b -r b4bef06be9d8 sys/arch/aarch64/aarch64/genassym.cf
--- a/sys/arch/aarch64/aarch64/genassym.cf Sat Dec 28 16:07:41 2019 +0000
+++ b/sys/arch/aarch64/aarch64/genassym.cf Sat Dec 28 17:19:43 2019 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.16 2019/12/27 18:56:47 jmcneill Exp $
+# $NetBSD: genassym.cf,v 1.17 2019/12/28 17:19:43 jmcneill Exp $
#-
# Copyright (c) 2014 The NetBSD Foundation, Inc.
# All rights reserved.
@@ -335,6 +335,7 @@
define MAIR_ATTR1 MAIR_ATTR1
define MAIR_ATTR2 MAIR_ATTR2
define MAIR_ATTR3 MAIR_ATTR3
+define MAIR_ATTR4 MAIR_ATTR4
define MAIR_DEVICE_nGnRnE MAIR_DEVICE_nGnRnE
define MAIR_DEVICE_nGnRE MAIR_DEVICE_nGnRE
define MAIR_NORMAL_NC MAIR_NORMAL_NC
diff -r fe3805f52c2b -r b4bef06be9d8 sys/arch/aarch64/aarch64/locore.S
--- a/sys/arch/aarch64/aarch64/locore.S Sat Dec 28 16:07:41 2019 +0000
+++ b/sys/arch/aarch64/aarch64/locore.S Sat Dec 28 17:19:43 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.48 2019/12/27 18:56:47 jmcneill Exp $ */
+/* $NetBSD: locore.S,v 1.49 2019/12/28 17:19:43 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -38,13 +38,14 @@
#include <aarch64/hypervisor.h>
#include "assym.h"
-RCSID("$NetBSD: locore.S,v 1.48 2019/12/27 18:56:47 jmcneill Exp $")
+RCSID("$NetBSD: locore.S,v 1.49 2019/12/28 17:19:43 jmcneill Exp $")
-#ifdef AARCH64_DEVICE_MEM_STRICTLY_ORDERED
+#ifdef AARCH64_DEVICE_MEM_STRONGLY_ORDERED
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRnE
#else
#define MAIR_DEVICE_MEM MAIR_DEVICE_nGnRE
#endif
+#define MAIR_DEVICE_MEM_SO MAIR_DEVICE_nGnRnE
/*#define DEBUG_LOCORE /* debug print */
/*#define DEBUG_LOCORE_PRINT_LOCK /* avoid mixing AP's output */
@@ -953,7 +954,8 @@
__SHIFTIN(MAIR_NORMAL_WB, MAIR_ATTR0) | \
__SHIFTIN(MAIR_NORMAL_NC, MAIR_ATTR1) | \
__SHIFTIN(MAIR_NORMAL_WT, MAIR_ATTR2) | \
- __SHIFTIN(MAIR_DEVICE_MEM, MAIR_ATTR3))
+ __SHIFTIN(MAIR_DEVICE_MEM, MAIR_ATTR3) | \
+ __SHIFTIN(MAIR_DEVICE_MEM_SO, MAIR_ATTR4))
#define VIRT_BIT 48
diff -r fe3805f52c2b -r b4bef06be9d8 sys/arch/aarch64/aarch64/pmap.c
--- a/sys/arch/aarch64/aarch64/pmap.c Sat Dec 28 16:07:41 2019 +0000
+++ b/sys/arch/aarch64/aarch64/pmap.c Sat Dec 28 17:19:43 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.57 2019/12/27 18:56:47 jmcneill Exp $ */
+/* $NetBSD: pmap.c,v 1.58 2019/12/28 17:19:43 jmcneill Exp $ */
/*
* Copyright (c) 2017 Ryo Shimizu <ryo%nerv.org@localhost>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.57 2019/12/27 18:56:47 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.58 2019/12/28 17:19:43 jmcneill Exp $");
#include "opt_arm_debug.h"
#include "opt_ddb.h"
@@ -951,7 +951,10 @@
pte &= ~LX_BLKPAG_ATTR_MASK;
- switch (flags & (PMAP_CACHE_MASK|PMAP_DEV)) {
+ switch (flags & (PMAP_CACHE_MASK|PMAP_DEV_MASK)) {
+ case PMAP_DEV_SO ... PMAP_DEV_SO | PMAP_CACHE_MASK:
+ pte |= LX_BLKPAG_ATTR_DEVICE_MEM_SO; /* Device-nGnRnE */
+ break;
case PMAP_DEV ... PMAP_DEV | PMAP_CACHE_MASK:
pte |= LX_BLKPAG_ATTR_DEVICE_MEM; /* Device-nGnRE */
break;
diff -r fe3805f52c2b -r b4bef06be9d8 sys/arch/aarch64/conf/files.aarch64
--- a/sys/arch/aarch64/conf/files.aarch64 Sat Dec 28 16:07:41 2019 +0000
+++ b/sys/arch/aarch64/conf/files.aarch64 Sat Dec 28 17:19:43 2019 +0000
@@ -1,10 +1,10 @@
-# $NetBSD: files.aarch64,v 1.15 2019/12/27 18:56:47 jmcneill Exp $
+# $NetBSD: files.aarch64,v 1.16 2019/12/28 17:19:43 jmcneill Exp $
defflag opt_cpuoptions.h AARCH64_ALIGNMENT_CHECK
defflag opt_cpuoptions.h AARCH64_EL0_STACK_ALIGNMENT_CHECK
defflag opt_cpuoptions.h AARCH64_EL1_STACK_ALIGNMENT_CHECK
defflag opt_cpuoptions.h AARCH64_HAVE_L2CTLR
-defflag opt_cpuoptions.h AARCH64_DEVICE_MEM_STRICTLY_ORDERED
+defflag opt_cpuoptions.h AARCH64_DEVICE_MEM_STRONGLY_ORDERED
defflag opt_cputypes.h CPU_ARMV8
defflag opt_cputypes.h CPU_CORTEX: CPU_ARMV8
diff -r fe3805f52c2b -r b4bef06be9d8 sys/arch/aarch64/include/pmap.h
--- a/sys/arch/aarch64/include/pmap.h Sat Dec 28 16:07:41 2019 +0000
+++ b/sys/arch/aarch64/include/pmap.h Sat Dec 28 17:19:43 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.27 2019/12/27 18:56:47 jmcneill Exp $ */
+/* $NetBSD: pmap.h,v 1.28 2019/12/28 17:19:43 jmcneill Exp $ */
/*-
* Copyright (c) 2014 The NetBSD Foundation, Inc.
@@ -114,6 +114,7 @@
#define LX_BLKPAG_ATTR_NORMAL_NC __SHIFTIN(1, LX_BLKPAG_ATTR_INDX)
#define LX_BLKPAG_ATTR_NORMAL_WT __SHIFTIN(2, LX_BLKPAG_ATTR_INDX)
#define LX_BLKPAG_ATTR_DEVICE_MEM __SHIFTIN(3, LX_BLKPAG_ATTR_INDX)
+#define LX_BLKPAG_ATTR_DEVICE_MEM_SO __SHIFTIN(4, LX_BLKPAG_ATTR_INDX)
#define LX_BLKPAG_ATTR_MASK LX_BLKPAG_ATTR_INDX
#define lxpde_pa(pde) ((paddr_t)((pde) & LX_TBL_PA))
@@ -228,6 +229,8 @@
#define PMAP_PTE 0x10000000 /* kenter_pa */
#define PMAP_DEV 0x20000000 /* kenter_pa */
+#define PMAP_DEV_SO 0x40000000 /* kenter_pa */
+#define PMAP_DEV_MASK (PMAP_DEV | PMAP_DEV_SO)
static inline u_int
aarch64_mmap_flags(paddr_t mdpgno)
@@ -235,12 +238,13 @@
u_int nflag, pflag;
/*
- * aarch64 arch has 4 memory attribute:
+ * aarch64 arch has 5 memory attribute:
*
* WriteBack - write back cache
* WriteThru - wite through cache
* NoCache - no cache
* Device(nGnRE) - no Gathering, no Reordering, Early write ack
+ * Device(nGnRnE) - no Gathering, no Reordering, no Early write ack
*
* but pmap has PMAP_{NOCACHE,WRITE_COMBINE,WRITE_BACK} flags.
*/
diff -r fe3805f52c2b -r b4bef06be9d8 sys/arch/arm/acpi/acpi_machdep.c
--- a/sys/arch/arm/acpi/acpi_machdep.c Sat Dec 28 16:07:41 2019 +0000
+++ b/sys/arch/arm/acpi/acpi_machdep.c Sat Dec 28 17:19:43 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpi_machdep.c,v 1.12 2019/12/23 15:34:23 jmcneill Exp $ */
+/* $NetBSD: acpi_machdep.c,v 1.13 2019/12/28 17:19:43 jmcneill Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -32,7 +32,7 @@
#include "pci.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.12 2019/12/23 15:34:23 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpi_machdep.c,v 1.13 2019/12/28 17:19:43 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -325,13 +325,27 @@
return AE_OK;
}
+#if NPCI > 0
+static struct bus_space acpi_md_mcfg_bs_tag;
+
+static int
+acpi_md_mcfg_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
+ bus_space_handle_t *bshp)
+{
+ return arm_generic_bs_tag.bs_map(t, bpa, size,
+ flag | _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, bshp);
+}
+#endif
+
void
acpi_md_callback(struct acpi_softc *sc)
{
ACPI_TABLE_HEADER *hdrp;
#if NPCI > 0
- acpimcfg_init(&arm_generic_bs_tag, NULL);
+ acpi_md_mcfg_bs_tag = arm_generic_bs_tag;
+ acpi_md_mcfg_bs_tag.bs_map = acpi_md_mcfg_bs_map;
+ acpimcfg_init(&acpi_md_mcfg_bs_tag, NULL);
#endif
if (acpi_madt_map() != AE_OK)
diff -r fe3805f52c2b -r b4bef06be9d8 sys/arch/arm/acpi/acpipchb.c
--- a/sys/arch/arm/acpi/acpipchb.c Sat Dec 28 16:07:41 2019 +0000
+++ b/sys/arch/arm/acpi/acpipchb.c Sat Dec 28 17:19:43 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: acpipchb.c,v 1.13 2019/10/15 13:27:50 jmcneill Exp $ */
+/* $NetBSD: acpipchb.c,v 1.14 2019/12/28 17:19:43 jmcneill Exp $ */
/*-
* Copyright (c) 2018 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.13 2019/10/15 13:27:50 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: acpipchb.c,v 1.14 2019/12/28 17:19:43 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -75,6 +75,8 @@
int (*map)(void *, bus_addr_t, bus_size_t,
int, bus_space_handle_t *);
+
+ int flags;
};
struct acpipchb_softc {
@@ -157,7 +159,8 @@
return AE_NOT_FOUND;
}
- error = bus_space_map(ap->ap_bst, mem->ar_base, mem->ar_length, 0, &ap->ap_conf_bsh);
+ error = bus_space_map(ap->ap_bst, mem->ar_base, mem->ar_length,
+ _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &ap->ap_conf_bsh);
if (error != 0)
return AE_NO_MEMORY;
@@ -309,6 +312,11 @@
if (size == 0)
return ERANGE;
+ if ((abs->flags & PCI_FLAGS_IO_OKAY) != 0) {
+ /* Force strongly ordered mapping for all I/O space */
+ flag = _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED;
+ }
+
for (i = 0; i < abs->nrange; i++) {
struct acpipchb_bus_range * const range = &abs->range[i];
if (bpa >= range->min && bpa + size - 1 <= range->max)
@@ -377,6 +385,7 @@
abs->bs = *sc->sc_memt;
abs->bs.bs_cookie = abs;
abs->map = abs->bs.bs_map;
+ abs->flags = pci_flags;
abs->bs.bs_map = acpipchb_bus_space_map;
if ((pci_flags & PCI_FLAGS_IO_OKAY) != 0)
pba->pba_iot = &abs->bs;
diff -r fe3805f52c2b -r b4bef06be9d8 sys/arch/arm/fdt/pcihost_fdt.c
--- a/sys/arch/arm/fdt/pcihost_fdt.c Sat Dec 28 16:07:41 2019 +0000
+++ b/sys/arch/arm/fdt/pcihost_fdt.c Sat Dec 28 17:19:43 2019 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pcihost_fdt.c,v 1.11 2019/06/23 22:06:03 jmcneill Exp $ */
+/* $NetBSD: pcihost_fdt.c,v 1.12 2019/12/28 17:19:43 jmcneill Exp $ */
/*-
* Copyright (c) 2018 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pcihost_fdt.c,v 1.11 2019/06/23 22:06:03 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pcihost_fdt.c,v 1.12 2019/12/28 17:19:43 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -126,7 +126,8 @@
sc->sc_dmat = faa->faa_dmat;
sc->sc_bst = faa->faa_bst;
sc->sc_phandle = faa->faa_phandle;
- error = bus_space_map(sc->sc_bst, cs_addr, cs_size, 0, &sc->sc_bsh);
+ error = bus_space_map(sc->sc_bst, cs_addr, cs_size,
+ _ARM_BUS_SPACE_MAP_STRONGLY_ORDERED, &sc->sc_bsh);
if (error) {
aprint_error(": couldn't map registers: %d\n", error);
return;
@@ -231,12 +232,14 @@
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