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[src/trunk]: src/sys/arch/mips/mips Do not touch FP register on softfloat ker...
details: https://anonhg.NetBSD.org/src/rev/b1d80d17352a
branches: trunk
changeset: 814546:b1d80d17352a
user: martin <martin%NetBSD.org@localhost>
date: Sat Mar 26 17:40:02 2016 +0000
description:
Do not touch FP register on softfloat kernels.
diffstat:
sys/arch/mips/mips/mips_fpu.c | 14 ++++++++++++--
1 files changed, 12 insertions(+), 2 deletions(-)
diffs (73 lines):
diff -r 32c3ee5a700b -r b1d80d17352a sys/arch/mips/mips/mips_fpu.c
--- a/sys/arch/mips/mips/mips_fpu.c Sat Mar 26 17:16:48 2016 +0000
+++ b/sys/arch/mips/mips/mips_fpu.c Sat Mar 26 17:40:02 2016 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: mips_fpu.c,v 1.12 2014/05/16 00:48:41 rmind Exp $ */
+/* $NetBSD: mips_fpu.c,v 1.13 2016/03/26 17:40:02 martin Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mips_fpu.c,v 1.12 2014/05/16 00:48:41 rmind Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_fpu.c,v 1.13 2016/03/26 17:40:02 martin Exp $");
#include "opt_multiprocessor.h"
@@ -85,8 +85,10 @@
mips_fpu_state_save(lwp_t *l)
{
struct trapframe * const tf = l->l_md.md_utf;
+#ifndef __mips_soft_float
struct pcb * const pcb = lwp_getpcb(l);
mips_fpreg_t * const fp = pcb->pcb_fpregs.r_regs;
+#endif
uint32_t status, fpcsr;
/*
@@ -118,6 +120,7 @@
/*
* save FPCSR and FP register values.
*/
+#if !defined(__mips_soft_float)
#if !defined(__mips_o32)
if (tf->tf_regs[_R_SR] & MIPS3_SR_FR) {
KASSERT(_MIPS_SIM_NEWABI_P(l->l_proc->p_md.md_abi));
@@ -198,6 +201,7 @@
"swc1 $f31, (31*%d1)(%0) ;"
".set reorder" :: "r"(fp), "i"(4));
}
+#endif
/*
* stop COP1
*/
@@ -209,7 +213,9 @@
{
struct trapframe * const tf = l->l_md.md_utf;
struct pcb * const pcb = lwp_getpcb(l);
+#ifndef __mips_soft_float
mips_fpreg_t * const fp = pcb->pcb_fpregs.r_regs;
+#endif
uint32_t status;
uint32_t fpcsr;
@@ -244,6 +250,7 @@
/*
* load FP registers and establish processes' FP context.
*/
+#if !defined(__mips_soft_float)
#if !defined(__mips_o32)
if (tf->tf_regs[_R_SR] & MIPS3_SR_FR) {
KASSERT(_MIPS_SIM_NEWABI_P(l->l_proc->p_md.md_abi));
@@ -326,6 +333,9 @@
: "r"(fp), "i"(4));
fpcsr = ((int *)fp)[32];
}
+#else
+ fpcsr = 0;
+#endif
/*
* load FPCSR and stop COP1 again
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