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[src/trunk]: src/sys/arch Tegra K1 Watchdog support.
details: https://anonhg.NetBSD.org/src/rev/20df70dc4bad
branches: trunk
changeset: 808699:20df70dc4bad
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sat May 30 13:25:55 2015 +0000
description:
Tegra K1 Watchdog support.
diffstat:
sys/arch/arm/nvidia/files.tegra | 7 +-
sys/arch/arm/nvidia/tegra_car.c | 26 ++++++-
sys/arch/arm/nvidia/tegra_carreg.h | 9 ++-
sys/arch/arm/nvidia/tegra_intr.h | 15 +++-
sys/arch/arm/nvidia/tegra_io.c | 6 +-
sys/arch/arm/nvidia/tegra_reg.h | 4 +-
sys/arch/arm/nvidia/tegra_timer.c | 140 +++++++++++++++++++++++++++++++++++
sys/arch/arm/nvidia/tegra_timerreg.h | 81 ++++++++++++++++++++
sys/arch/arm/nvidia/tegra_var.h | 3 +-
sys/arch/evbarm/conf/JETSONTK1 | 5 +-
10 files changed, 285 insertions(+), 11 deletions(-)
diffs (truncated from 440 to 300 lines):
diff -r 48c2a9565f4e -r 20df70dc4bad sys/arch/arm/nvidia/files.tegra
--- a/sys/arch/arm/nvidia/files.tegra Sat May 30 11:10:24 2015 +0000
+++ b/sys/arch/arm/nvidia/files.tegra Sat May 30 13:25:55 2015 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.tegra,v 1.13 2015/05/18 20:36:42 jmcneill Exp $
+# $NetBSD: files.tegra,v 1.14 2015/05/30 13:25:55 jmcneill Exp $
#
# Configuration info for NVIDIA Tegra ARM Peripherals
#
@@ -42,6 +42,11 @@
attach tegragpio at tegraio with tegra_gpio
file arch/arm/nvidia/tegra_gpio.c tegra_gpio
+# Timers
+device tegratimer: sysmon_wdog
+attach tegratimer at tegraio with tegra_timer
+file arch/arm/nvidia/tegra_timer.c tegra_timer
+
# MPIO / Pinmux
device tegrampio
attach tegrampio at tegraio with tegra_mpio
diff -r 48c2a9565f4e -r 20df70dc4bad sys/arch/arm/nvidia/tegra_car.c
--- a/sys/arch/arm/nvidia/tegra_car.c Sat May 30 11:10:24 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_car.c Sat May 30 13:25:55 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_car.c,v 1.20 2015/05/30 11:10:24 jmcneill Exp $ */
+/* $NetBSD: tegra_car.c,v 1.21 2015/05/30 13:25:55 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
#include "locators.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_car.c,v 1.20 2015/05/30 11:10:24 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_car.c,v 1.21 2015/05/30 13:25:55 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -792,3 +792,25 @@
/* Leave reset */
bus_space_write_4(bst, bsh, CAR_RST_DEV_L_CLR_REG, CAR_DEV_L_HOST1X);
}
+
+void
+tegra_car_wdt_enable(u_int timer, bool enable)
+{
+ bus_space_tag_t bst;
+ bus_space_handle_t bsh;
+ uint32_t enable_bits;
+
+ KASSERT(timer == 1 || timer == 2);
+
+ tegra_car_get_bs(&bst, &bsh);
+
+ enable_bits = enable ?
+ (CAR_RST_SOURCE_WDT_EN|CAR_RST_SOURCE_WDT_SYS_RST_EN) : 0;
+
+ tegra_reg_set_clear(bst, bsh, CAR_RST_SOURCE_REG,
+ __SHIFTIN(timer - 1, CAR_RST_SOURCE_WDT_SEL) |
+ enable_bits,
+ CAR_RST_SOURCE_WDT_SYS_RST_EN |
+ CAR_RST_SOURCE_WDT_SEL |
+ CAR_RST_SOURCE_WDT_EN);
+}
diff -r 48c2a9565f4e -r 20df70dc4bad sys/arch/arm/nvidia/tegra_carreg.h
--- a/sys/arch/arm/nvidia/tegra_carreg.h Sat May 30 11:10:24 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_carreg.h Sat May 30 13:25:55 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_carreg.h,v 1.17 2015/05/30 11:10:24 jmcneill Exp $ */
+/* $NetBSD: tegra_carreg.h,v 1.18 2015/05/30 13:25:55 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -29,6 +29,13 @@
#ifndef _ARM_TEGRA_CARREG_H
#define _ARM_TEGRA_CARREG_H
+#define CAR_RST_SOURCE_REG 0x00
+#define CAR_RST_SOURCE_WDT_EN __BIT(5)
+#define CAR_RST_SOURCE_WDT_SEL __BIT(4)
+#define CAR_RST_SOURCE_WDT_SYS_RST_EN __BIT(2)
+#define CAR_RST_SOURCE_WDT_COP_RST_EN __BIT(1)
+#define CAR_RST_SOURCE_WDT_CPU_RST_EN __BIT(0)
+
#define CAR_CLK_OUT_ENB_L_REG 0x10
#define CAR_CLK_OUT_ENB_H_REG 0x14
#define CAR_CLK_OUT_ENB_U_REG 0x18
diff -r 48c2a9565f4e -r 20df70dc4bad sys/arch/arm/nvidia/tegra_intr.h
--- a/sys/arch/arm/nvidia/tegra_intr.h Sat May 30 11:10:24 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_intr.h Sat May 30 13:25:55 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_intr.h,v 1.5 2015/05/17 01:28:32 jmcneill Exp $ */
+/* $NetBSD: tegra_intr.h,v 1.6 2015/05/30 13:25:55 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -37,6 +37,8 @@
#define TEGRA_INTR(x) ((x) + 32)
+#define TEGRA_INTR_TMR1 TEGRA_INTR(0)
+#define TEGRA_INTR_TMR2 TEGRA_INTR(1)
#define TEGRA_INTR_SDMMC1 TEGRA_INTR(14)
#define TEGRA_INTR_SDMMC2 TEGRA_INTR(15)
#define TEGRA_INTR_SDMMC3 TEGRA_INTR(19)
@@ -47,6 +49,8 @@
#define TEGRA_INTR_UARTA TEGRA_INTR(36)
#define TEGRA_INTR_UARTB TEGRA_INTR(37)
#define TEGRA_INTR_I2C1 TEGRA_INTR(38)
+#define TEGRA_INTR_TMR3 TEGRA_INTR(41)
+#define TEGRA_INTR_TMR4 TEGRA_INTR(42)
#define TEGRA_INTR_UARTC TEGRA_INTR(46)
#define TEGRA_INTR_I2C5 TEGRA_INTR(53)
#define TEGRA_INTR_I2C6 TEGRA_INTR(63)
@@ -62,5 +66,12 @@
#define TEGRA_INTR_PCIE_MSI TEGRA_INTR(99)
#define TEGRA_INTR_PCIE_WAKE TEGRA_INTR(100)
#define TEGRA_INTR_I2C4 TEGRA_INTR(120)
-
+#define TEGRA_INTR_TMR5 TEGRA_INTR(121)
+#define TEGRA_INTR_WDT_CPU TEGRA_INTR(123)
+#define TEGRA_INTR_WDT_AVP TEGRA_INTR(124)
+#define TEGRA_INTR_TMR6 TEGRA_INTR(152)
+#define TEGRA_INTR_TMR7 TEGRA_INTR(153)
+#define TEGRA_INTR_TMR8 TEGRA_INTR(154)
+#define TEGRA_INTR_TMR9 TEGRA_INTR(155)
+#define TEGRA_INTR_TMR0 TEGRA_INTR(156)
#endif /* _ARM_TEGRA_INTR_H */
diff -r 48c2a9565f4e -r 20df70dc4bad sys/arch/arm/nvidia/tegra_io.c
--- a/sys/arch/arm/nvidia/tegra_io.c Sat May 30 11:10:24 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_io.c Sat May 30 13:25:55 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_io.c,v 1.11 2015/05/18 20:36:42 jmcneill Exp $ */
+/* $NetBSD: tegra_io.c,v 1.12 2015/05/30 13:25:55 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
#include "opt_tegra.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_io.c,v 1.11 2015/05/18 20:36:42 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_io.c,v 1.12 2015/05/30 13:25:55 jmcneill Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@@ -66,6 +66,8 @@
TEGRA_CAR_OFFSET, TEGRA_CAR_SIZE, NOPORT, NOINTR },
{ "tegragpio",
TEGRA_GPIO_OFFSET, TEGRA_GPIO_SIZE, NOPORT, NOINTR },
+ { "tegratimer",
+ TEGRA_TIMER_OFFSET, TEGRA_TIMER_SIZE, NOPORT, NOINTR },
};
static const struct tegra_locators tegra_apb_locators[] = {
diff -r 48c2a9565f4e -r 20df70dc4bad sys/arch/arm/nvidia/tegra_reg.h
--- a/sys/arch/arm/nvidia/tegra_reg.h Sat May 30 11:10:24 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_reg.h Sat May 30 13:25:55 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_reg.h,v 1.11 2015/05/18 20:36:42 jmcneill Exp $ */
+/* $NetBSD: tegra_reg.h,v 1.12 2015/05/30 13:25:55 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -120,6 +120,8 @@
#define TEGRA_XUSB_DEV_SIZE 0xa000
/* PPSB */
+#define TEGRA_TIMER_OFFSET 0x00005000
+#define TEGRA_TIMER_SIZE 0x400
#define TEGRA_CAR_OFFSET 0x00006000
#define TEGRA_CAR_SIZE 0x1000
#define TEGRA_GPIO_OFFSET 0x0000d000
diff -r 48c2a9565f4e -r 20df70dc4bad sys/arch/arm/nvidia/tegra_timer.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/nvidia/tegra_timer.c Sat May 30 13:25:55 2015 +0000
@@ -0,0 +1,140 @@
+/* $NetBSD: tegra_timer.c,v 1.1 2015/05/30 13:25:55 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: tegra_timer.c,v 1.1 2015/05/30 13:25:55 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/wdog.h>
+
+#include <dev/sysmon/sysmonvar.h>
+
+#include <arm/nvidia/tegra_reg.h>
+#include <arm/nvidia/tegra_timerreg.h>
+#include <arm/nvidia/tegra_var.h>
+
+#define TEGRA_TIMER_WDOG_PERIOD_DEFAULT 10
+
+static int tegra_timer_match(device_t, cfdata_t, void *);
+static void tegra_timer_attach(device_t, device_t, void *);
+
+struct tegra_timer_softc {
+ device_t sc_dev;
+ bus_space_tag_t sc_bst;
+ bus_space_handle_t sc_bsh;
+
+ struct sysmon_wdog sc_smw;
+};
+
+static int tegra_timer_wdt_setmode(struct sysmon_wdog *);
+static int tegra_timer_wdt_tickle(struct sysmon_wdog *);
+
+CFATTACH_DECL_NEW(tegra_timer, sizeof(struct tegra_timer_softc),
+ tegra_timer_match, tegra_timer_attach, NULL, NULL);
+
+#define TIMER_READ(sc, reg) \
+ bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
+#define TIMER_WRITE(sc, reg, val) \
+ bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
+#define TIMER_SET_CLEAR(sc, reg, set, clr) \
+ tegra_reg_set_clear((sc)->sc_bst, (sc)->sc_bsh, (reg), (set), (clr))
+
+static int
+tegra_timer_match(device_t parent, cfdata_t cf, void *aux)
+{
+ return 1;
+}
+
+static void
+tegra_timer_attach(device_t parent, device_t self, void *aux)
+{
+ struct tegra_timer_softc * const sc = device_private(self);
+ struct tegraio_attach_args * const tio = aux;
+ const struct tegra_locators * const loc = &tio->tio_loc;
+
+ sc->sc_dev = self;
+ sc->sc_bst = tio->tio_bst;
+ bus_space_subregion(tio->tio_bst, tio->tio_bsh,
+ loc->loc_offset, loc->loc_size, &sc->sc_bsh);
+
+ aprint_naive("\n");
+ aprint_normal(": Timers\n");
+
+ sc->sc_smw.smw_name = device_xname(self);
+ sc->sc_smw.smw_cookie = sc;
+ sc->sc_smw.smw_setmode = tegra_timer_wdt_setmode;
+ sc->sc_smw.smw_tickle = tegra_timer_wdt_tickle;
+ sc->sc_smw.smw_period = TEGRA_TIMER_WDOG_PERIOD_DEFAULT;
+
+ aprint_normal_dev(self, "default watchdog period is %u seconds\n",
+ sc->sc_smw.smw_period);
+
+ if (sysmon_wdog_register(&sc->sc_smw) != 0)
+ aprint_error_dev(self, "couldn't register with sysmon\n");
+}
+
+static int
+tegra_timer_wdt_setmode(struct sysmon_wdog *smw)
+{
+ struct tegra_timer_softc * const sc = smw->smw_cookie;
+
+ if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
+ TIMER_SET_CLEAR(sc, TMR1_PTV_REG, 0, TMR_PTV_EN);
+ tegra_car_wdt_enable(1, false);
+ } else {
+ if (smw->smw_period == WDOG_PERIOD_DEFAULT) {
+ sc->sc_smw.smw_period = TEGRA_TIMER_WDOG_PERIOD_DEFAULT;
+ } else if (smw->smw_period == 0 || smw->smw_period > 1000) {
+ return EINVAL;
+ } else {
+ sc->sc_smw.smw_period = smw->smw_period;
+ }
+ u_int tval = (sc->sc_smw.smw_period * 1000000) / 2;
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