[src/trunk]: src/sys/arch/mips/mips On mipsNN use the trap instruction to pan...

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/7556c4e5a330
branches:  trunk
changeset: 808892:7556c4e5a330
user:      matt <matt%NetBSD.org@localhost>
date:      Sat Jun 06 20:55:45 2015 +0000

description:
On mipsNN use the trap instruction to panic or pop into ddb instead of
looping forever in the PARANOIA chunks.

diffstat:

 sys/arch/mips/mips/locore.S |  38 ++++++++++++++++++++++++++++++--------
 1 files changed, 30 insertions(+), 8 deletions(-)

diffs (123 lines):

diff -r 570b62c364bc -r 7556c4e5a330 sys/arch/mips/mips/locore.S
--- a/sys/arch/mips/mips/locore.S       Sat Jun 06 20:53:38 2015 +0000
+++ b/sys/arch/mips/mips/locore.S       Sat Jun 06 20:55:45 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: locore.S,v 1.194 2015/06/03 17:55:26 matt Exp $        */
+/*     $NetBSD: locore.S,v 1.195 2015/06/06 20:55:45 matt Exp $        */
 
 /*
  * Copyright (c) 1992, 1993
@@ -212,20 +212,28 @@
  * called at IPL_SCHED
  */
 NESTED(cpu_switchto, CALLFRAME_SIZ, ra)
-#ifdef PARANOIA
+#if defined(PARANOIA)
        /*
         * Make sure we are at IPL_SCHED
         */
        PTR_L   v0, L_CPU(MIPS_CURLWP)
        INT_L   v1, CPU_INFO_CPL(v0)
+#if __mips >= 32
+       tnei    v1, IPL_SCHED
+#else
        li      v0, IPL_SCHED
 10:    bne     v0, v1, 10b
         nop
+#endif
 
        mfc0    t0, MIPS_COP_0_STATUS
        and     t0, MIPS_SR_INT_IE
+#if __mips >= 32
+       teqi    t0, 0
+#else
 11:    beqz    t0, 11b
         nop
+#endif
 #endif /* PARANOIA */
        /*
         * Save old context, unless the LWP is exiting.
@@ -253,13 +261,13 @@
 #endif
        REG_EPILOGUE
 1:
-#ifdef PARANOIA
+#if defined(PARANOID_SPL)
        /*
         * Verify interrupt configuration matches IPL_SCHED
         */
        jal     _C_LABEL(splcheck)
         nop
-#endif /* PARANOIA */
+#endif /* PARANOID_SPL */
 
        move    s6, a0                          # s6 = old lwp
        move    MIPS_CURLWP, a1                 # t8 = new lwp
@@ -294,7 +302,10 @@
        move    v0, s6                          # Save return value (old lwp)
        REG_PROLOGUE
        REG_L   t0, PCB_CONTEXT+SF_REG_SR(s5)
-#ifdef PARANOID_LOOP
+#if defined(PARANOIA) && __mips >= 32
+       and     t1, t0, MIPS_SR_INT_IE
+       teqi    t1, 0
+#elif defined(PARANOID_LOOP)
        and     t1, t0, MIPS_SR_INT_IE
 2:     beqz    t1, 2b                  # status reg should not differ
         nop
@@ -318,7 +329,7 @@
        REG_L   s8, PCB_CONTEXT+SF_REG_S8(a0)
        REG_EPILOGUE
        mtc0    t0, MIPS_COP_0_STATUS
-#ifdef PARANOIA
+#if defined(PARANOID_SPL)
        COP0_SYNC
        /*
         * Verify interrupt configuration still matches IPL_SCHED
@@ -327,7 +338,7 @@
         nop
 #else
        JR_HB_RA
-#endif /* PARANOIA */
+#endif /* PARANOID_SPL */
 END(cpu_switchto)
 
 #ifdef __HAVE_FAST_SOFTINTS
@@ -341,8 +352,12 @@
 #ifdef PARANOIA
        mfc0    t1, MIPS_COP_0_STATUS
        and     v0, t1, MIPS_SR_INT_IE
+#if __mips >= 32
+       teqi    v0, 0
+#else
 1:     beqz    v0, 1b
         nop
+#endif
 #endif /* PARANOIA */
        PTR_L   t0, L_CPU(MIPS_CURLWP)
        NOP_L                                   # load delay
@@ -378,7 +393,10 @@
         * to.
         */
        mfc0    t1, MIPS_COP_0_STATUS
-#ifdef PARANOID_LOOP
+#if defined(PARANOIA) && __mips >= 32
+       and     v0, t1, MIPS_SR_INT_IE          # assert interrupts are on
+       teqi    v0, 0
+#elif defined(PARANOID_LOOP)
        and     v0, t1, MIPS_SR_INT_IE          # assert interrupts are on
 1:     beqz    v0, 1b
         nop
@@ -472,8 +490,12 @@
 #ifdef PARANOIA
        mfc0    v0, MIPS_COP_0_STATUS
        and     t0, v0, MIPS_SR_INT_IE
+#if __mips >= 32
+       teqi    t0, 0
+#else
 1:     beqz    t0, 1b
         nop
+#endif
 #endif /* PARANOIA */
        REG_PROLOGUE
        REG_S   s0, PCB_CONTEXT+SF_REG_S0(a0)