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[src/trunk]: src/sys/arch/x86/include Add some new TLB and cache entries from...
details: https://anonhg.NetBSD.org/src/rev/91f4e234e7f9
branches: trunk
changeset: 787985:91f4e234e7f9
user: msaitoh <msaitoh%NetBSD.org@localhost>
date: Wed Jul 17 15:26:38 2013 +0000
description:
Add some new TLB and cache entries from document (Table 3-22 Encoding of CPUID
Leaf 2 Descriptors, Intel 64 and IA-32 Architectures Software Developer's
Manual Vol. 2A.)
diffstat:
sys/arch/x86/include/cacheinfo.h | 5 ++++-
1 files changed, 4 insertions(+), 1 deletions(-)
diffs (33 lines):
diff -r a26a1fcf5603 -r 91f4e234e7f9 sys/arch/x86/include/cacheinfo.h
--- a/sys/arch/x86/include/cacheinfo.h Wed Jul 17 15:22:43 2013 +0000
+++ b/sys/arch/x86/include/cacheinfo.h Wed Jul 17 15:26:38 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: cacheinfo.h,v 1.14 2013/07/17 15:22:43 msaitoh Exp $ */
+/* $NetBSD: cacheinfo.h,v 1.15 2013/07/17 15:26:38 msaitoh Exp $ */
#ifndef _X86_CACHEINFO_H_
#define _X86_CACHEINFO_H_
@@ -222,6 +222,7 @@
__CI_TBL(CAI_ITLB, 0x55, 0xff, 64, 4 * 1024, "2M/4M: 7 entries"), \
__CI_TBL(CAI_DTLB2, 0x56, 4, 16, 4 * 1024 * 1024, NULL), \
__CI_TBL(CAI_DTLB2, 0x57, 4, 16, 4 * 1024, NULL), \
+__CI_TBL(CAI_DTLB2, 0x59, 0xff, 16, 4 * 1024, NULL), \
__CI_TBL(CAI_DTLB, 0x5a, 0xff, 64, 4 * 1024, "2M/4M: 32 entries (L0)"), \
__CI_TBL(CAI_DTLB, 0x5b, 0xff, 64, 4 * 1024, "4K/4M: 64 entries"), \
__CI_TBL(CAI_DTLB, 0x5c, 0xff, 64, 4 * 1024, "4K/4M: 128 entries"),\
@@ -235,6 +236,7 @@
__CI_TBL(CAI_DCACHE, 0x0a, 2, 8 * 1024, 32, NULL), \
__CI_TBL(CAI_DCACHE, 0x0c, 4, 16 * 1024, 32, NULL), \
__CI_TBL(CAI_DCACHE, 0x0d, 4, 16 * 1024, 64, NULL), \
+__CI_TBL(CAI_DCACHE, 0x0e, 6, 24 * 1024, 64, NULL), \
__CI_TBL(CAI_L2CACHE, 0x21, 8, 256 * 1024, 64, NULL), /* L2 (MLC) */ \
__CI_TBL(CAI_L2CACHE, 0x39, 4, 128 * 1024, 64, NULL), \
__CI_TBL(CAI_L2CACHE, 0x3a, 6, 192 * 1024, 64, NULL), \
@@ -269,6 +271,7 @@
__CI_TBL(CAI_L2CACHE, 0x7c, 8, 1 * 1024 * 1024, 64, NULL), \
__CI_TBL(CAI_L2CACHE, 0x7d, 8, 2 * 1024 * 1024, 64, NULL), \
__CI_TBL(CAI_L2CACHE, 0x7f, 2, 512 * 1024, 64, NULL), \
+__CI_TBL(CAI_L2CACHE, 0x80, 8, 512 * 1024, 64, NULL), \
__CI_TBL(CAI_L2CACHE, 0x82, 8, 256 * 1024, 32, NULL), \
__CI_TBL(CAI_L2CACHE, 0x83, 8, 512 * 1024, 32, NULL), \
__CI_TBL(CAI_L2CACHE, 0x84, 8, 1 * 1024 * 1024, 32, NULL), \
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