[src/trunk]: src/sys/arch/evbarm/conf Fix the names of the (commented out) Ki...

[martin <martin%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/9d278f6fe30e
branches:  trunk
changeset: 803212:9d278f6fe30e
user:      martin <martin%NetBSD.org@localhost>
date:      Fri Oct 17 18:45:14 2014 +0000

description:
Fix the names of the (commented out) Kirwood L2 cache options.

diffstat:

 sys/arch/evbarm/conf/HPT5325       |  7 +++----
 sys/arch/evbarm/conf/OPENBLOCKS_A6 |  7 +++----
 sys/arch/evbarm/conf/SHEEVAPLUG    |  7 +++----
 3 files changed, 9 insertions(+), 12 deletions(-)

diffs (63 lines):

diff -r 14e2896ed34e -r 9d278f6fe30e sys/arch/evbarm/conf/HPT5325
--- a/sys/arch/evbarm/conf/HPT5325      Fri Oct 17 18:31:07 2014 +0000
+++ b/sys/arch/evbarm/conf/HPT5325      Fri Oct 17 18:45:14 2014 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: HPT5325,v 1.23 2014/08/23 20:26:57 dholland Exp $
+#      $NetBSD: HPT5325,v 1.24 2014/10/17 18:45:14 martin Exp $
 #
 #  This configuration supports for HP T5325 Thin Client
 #
@@ -17,9 +17,8 @@
 
 # CPU options
 options        CPU_SHEEVA
-#options       MV_L2_CACHE_ENABLE
-#options       MV_L2_CACHE_WRITE_THROUGH
-options        MV_CACHE_RANGE_OPS
+#options       SHEEVA_L2_CACHE
+#options       SHEEVA_L2_CACHE_WT
 #makeoptions   CPUFLAGS="-march=armv5te"
 makeoptions    CPUFLAGS="-mtune=arm9e"
 
diff -r 14e2896ed34e -r 9d278f6fe30e sys/arch/evbarm/conf/OPENBLOCKS_A6
--- a/sys/arch/evbarm/conf/OPENBLOCKS_A6        Fri Oct 17 18:31:07 2014 +0000
+++ b/sys/arch/evbarm/conf/OPENBLOCKS_A6        Fri Oct 17 18:45:14 2014 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: OPENBLOCKS_A6,v 1.23 2014/08/23 20:26:57 dholland Exp $
+#      $NetBSD: OPENBLOCKS_A6,v 1.24 2014/10/17 18:45:14 martin Exp $
 #
 #      OPENBLOCKS_A6 -- Plat'Home. OpenBlockS A6 kernel
 #
@@ -17,9 +17,8 @@
 
 # CPU options
 options        CPU_SHEEVA
-#options       MV_L2_CACHE_ENABLE
-#options       MV_L2_CACHE_WRITE_THROUGH
-options        MV_CACHE_RANGE_OPS
+#options       SHEEVA_L2_CACHE
+#options       SHEEVA_L2_CACHE_WT
 makeoptions    CPUFLAGS="-march=armv5te"
 
 # Marvell SoC options
diff -r 14e2896ed34e -r 9d278f6fe30e sys/arch/evbarm/conf/SHEEVAPLUG
--- a/sys/arch/evbarm/conf/SHEEVAPLUG   Fri Oct 17 18:31:07 2014 +0000
+++ b/sys/arch/evbarm/conf/SHEEVAPLUG   Fri Oct 17 18:45:14 2014 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: SHEEVAPLUG,v 1.45 2014/10/14 13:53:34 htodd Exp $
+#      $NetBSD: SHEEVAPLUG,v 1.46 2014/10/17 18:45:14 martin Exp $
 #
 #  This configuration supports for generically Marvell SheevaPlug
 #
@@ -17,9 +17,8 @@
 
 # CPU options
 options        CPU_SHEEVA
-#options       MV_L2_CACHE_ENABLE
-#options       MV_L2_CACHE_WRITE_THROUGH
-options        MV_CACHE_RANGE_OPS
+#options       SHEEVA_L2_CACHE
+#options       SHEEVA_L2_CACHE_WT
 makeoptions    CPUFLAGS="-march=armv5te"
 
 # Marvell SoC options