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[src/trunk]: src/sys/arch/sparc Add PCI fixup for MicroSPARC-IIep.
details: https://anonhg.NetBSD.org/src/rev/ec6f3482f3af
branches: trunk
changeset: 786114:ec6f3482f3af
user: jdc <jdc%NetBSD.org@localhost>
date: Tue Apr 16 06:57:05 2013 +0000
description:
Add PCI fixup for MicroSPARC-IIep.
Unconfigured PCI-PCI bridges and devices behind them are configured.
diffstat:
sys/arch/sparc/conf/files.sparc | 3 +-
sys/arch/sparc/include/pci_machdep.h | 8 +-
sys/arch/sparc/sparc/autoconf.c | 19 +-
sys/arch/sparc/sparc/msiiep.c | 40 +-
sys/arch/sparc/sparc/msiiepvar.h | 15 +-
sys/arch/sparc/sparc/pci_fixup.c | 527 +++++++++++++++++++++++++++++++++++
sys/arch/sparc/sparc/pci_fixup.h | 33 ++
sys/arch/sparc/sparc/pci_machdep.c | 161 ++++++++--
8 files changed, 751 insertions(+), 55 deletions(-)
diffs (truncated from 1041 to 300 lines):
diff -r 9d3c749bce42 -r ec6f3482f3af sys/arch/sparc/conf/files.sparc
--- a/sys/arch/sparc/conf/files.sparc Mon Apr 15 22:50:08 2013 +0000
+++ b/sys/arch/sparc/conf/files.sparc Tue Apr 16 06:57:05 2013 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.sparc,v 1.153 2013/02/05 21:52:48 macallan Exp $
+# $NetBSD: files.sparc,v 1.154 2013/04/16 06:57:05 jdc Exp $
# @(#)files.sparc 8.1 (Berkeley) 7/19/93
# sparc-specific configuration info
@@ -28,6 +28,7 @@
attach mspcic at msiiep
file arch/sparc/sparc/msiiep.c msiiep | mspcic
file arch/sparc/sparc/pci_machdep.c msiiep | mspcic
+file arch/sparc/sparc/pci_fixup.c msiiep | mspcic
device ebus {[addr = -1]}
attach ebus at pci
diff -r 9d3c749bce42 -r ec6f3482f3af sys/arch/sparc/include/pci_machdep.h
--- a/sys/arch/sparc/include/pci_machdep.h Mon Apr 15 22:50:08 2013 +0000
+++ b/sys/arch/sparc/include/pci_machdep.h Tue Apr 16 06:57:05 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pci_machdep.h,v 1.9 2012/10/27 17:18:11 chs Exp $ */
+/* $NetBSD: pci_machdep.h,v 1.10 2013/04/16 06:57:06 jdc Exp $ */
/*
* Copyright (c) 1999 Matthew R. Green
@@ -55,6 +55,10 @@
void *cookie; /* msiiep_softc, but sssh! */
};
+#define IS_PCI_BRIDGE(class) \
+ (((class >> 16) & 0xff) == PCI_CLASS_BRIDGE && \
+ ((class >> 8) & 0xff) == PCI_SUBCLASS_BRIDGE_PCI)
+
/*
* The MI PCI code expects pcitag_t to be a scalar type. But besides
* the bus/device/function we need to store the OFW node as well. We
@@ -63,7 +67,7 @@
* form directly suitable for pci mode1 configuration address port.
*/
#define PCITAG_CREATE(n,b,d,f) \
- (((uint64_t)(n)<<32)|0x80000000U|((b)<<16)|((d)<<11)|((f)<<8))
+ (((uint64_t)(n)<<32)|0x80000000U|((b)<<16)|((d)<<11)|((f)<<8)|(b?1:0))
#define PCITAG_NODE(t) ((uint32_t)(((t)>>32)&0xffffffff))
#define PCITAG_OFFSET(t) ((uint32_t)((t)&0xffffffff))
diff -r 9d3c749bce42 -r ec6f3482f3af sys/arch/sparc/sparc/autoconf.c
--- a/sys/arch/sparc/sparc/autoconf.c Mon Apr 15 22:50:08 2013 +0000
+++ b/sys/arch/sparc/sparc/autoconf.c Tue Apr 16 06:57:05 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: autoconf.c,v 1.250 2013/02/14 12:44:16 martin Exp $ */
+/* $NetBSD: autoconf.c,v 1.251 2013/04/16 06:57:06 jdc Exp $ */
/*
* Copyright (c) 1996
@@ -48,7 +48,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.250 2013/02/14 12:44:16 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.251 2013/04/16 06:57:06 jdc Exp $");
#include "opt_ddb.h"
#include "opt_kgdb.h"
@@ -101,6 +101,9 @@
#include <dev/pci/pcidevs.h>
#include <dev/pci/pcivar.h>
#include <sparc/sparc/msiiepreg.h>
+#ifdef MSIIEP
+#include <sparc/sparc/pci_fixup.h>
+#endif
#ifdef DDB
#include <machine/db_machdep.h>
@@ -360,7 +363,6 @@
if ((bi_howto = lookup_bootinfo(BTINFO_BOOTHOWTO)) != NULL) {
boothowto = bi_howto->boothowto;
-printf("initialized boothowt from bootloader: %x\n", boothowto);
}
}
@@ -1757,12 +1759,23 @@
bootpath_store(1, NULL);
}
+/*
+ * We use device_register() to:
+ * set device properties on PCI devices
+ * find the bootpath
+ */
void
device_register(device_t dev, void *aux)
{
struct bootpath *bp = bootpath_store(0, NULL);
const char *bpname;
+#ifdef MSIIEP
+ /* Check for PCI devices */
+ if (bus_class(device_parent(dev)) == BUSCLASS_PCI)
+ set_pci_props(dev);
+#endif
+
/*
* If device name does not match current bootpath component
* then there's nothing interesting to consider.
diff -r 9d3c749bce42 -r ec6f3482f3af sys/arch/sparc/sparc/msiiep.c
--- a/sys/arch/sparc/sparc/msiiep.c Mon Apr 15 22:50:08 2013 +0000
+++ b/sys/arch/sparc/sparc/msiiep.c Tue Apr 16 06:57:05 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: msiiep.c,v 1.43 2011/07/17 23:34:17 mrg Exp $ */
+/* $NetBSD: msiiep.c,v 1.44 2013/04/16 06:57:06 jdc Exp $ */
/*
* Copyright (c) 2001 Valeriy E. Ushakov
@@ -27,7 +27,7 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: msiiep.c,v 1.43 2011/07/17 23:34:17 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: msiiep.c,v 1.44 2013/04/16 06:57:06 jdc Exp $");
#include <sys/param.h>
#include <sys/malloc.h>
@@ -48,7 +48,7 @@
#include <sparc/sparc/msiiepreg.h>
#include <sparc/sparc/msiiepvar.h>
-
+#include <sparc/sparc/pci_fixup.h>
/*
* Autoconfiguration.
@@ -98,23 +98,13 @@
static struct sparc_pci_chipset mspcic_pc_tag = { NULL };
-/*
- * Bus space tags for memory and i/o.
- */
-
-struct mspcic_pci_map {
- uint32_t sysbase;
- uint32_t pcibase;
- uint32_t size;
-};
-
/* fixed i/o and one set of i/o cycle translation registers */
-static struct mspcic_pci_map mspcic_pci_iomap[2] = {
+struct mspcic_pci_map mspcic_pci_iomap[IOMAP_SIZE] = {
{ 0x30000000, 0x0, 0x00010000 } /* fixed i/o (decoded bits) */
};
/* fixed mem and two sets of mem cycle translation registers */
-static struct mspcic_pci_map mspcic_pci_memmap[3] = {
+struct mspcic_pci_map mspcic_pci_memmap[MEMMAP_SIZE] = {
{ 0x30100000, 0x00100000, 0x00f00000 } /* fixed mem (pass through) */
};
@@ -282,7 +272,7 @@
struct msiiep_attach_args *msa = aux;
struct mainbus_attach_args *ma = msa->msa_ma;
int node = ma->ma_node;
- char devinfo[256];
+ char devinfo[256], buf[32], *model;
struct pcibus_attach_args pba;
@@ -300,6 +290,22 @@
mspcic_init_maps();
+ /*
+ * On Espresso, we need to adjust the interrupt mapping on
+ * lines 4-7, as onboard devices and cards in the PCI slots use
+ * those lines. Note, that enabling line 5 (onboard ide) causes
+ * a continuous interrupt stream, so leave that unmapped (0).
+ * Any other device using line 5 can't be used.
+ * Interrupt line wiring for slots is set in pci_machdep.c.
+ * Set the PCI Trdy and Retry Counters to non-zero values, otherwise
+ * we'll lock up when using devices behind a PCI-PCI bridge.
+ */
+ model = prom_getpropstringA(prom_findroot(), "model", buf, sizeof(buf));
+ if (model != NULL && !strcmp(model, "SUNW,375-0059")) {
+ mspcic_write_2(pcic_intr_asgn_sel_hi, (uint16_t) 0x7502);
+ mspcic_write_4(pcic_cntrs, (uint32_t) 0x00808000);
+ }
+
/* init cookies/parents in our statically allocated tags */
mspcic_io_tag = *sc->sc_bustag;
mspcic_io_tag.cookie = &mspcic_io_cookie;
@@ -353,6 +359,8 @@
pba.pba_pc = &mspcic_pc_tag;
pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY;
+ mspcic_pci_scan(sc->sc_node);
+
config_found_ia(self, "pcibus", &pba, mspcic_print);
}
diff -r 9d3c749bce42 -r ec6f3482f3af sys/arch/sparc/sparc/msiiepvar.h
--- a/sys/arch/sparc/sparc/msiiepvar.h Mon Apr 15 22:50:08 2013 +0000
+++ b/sys/arch/sparc/sparc/msiiepvar.h Tue Apr 16 06:57:05 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: msiiepvar.h,v 1.8 2011/07/17 23:32:37 mrg Exp $ */
+/* $NetBSD: msiiepvar.h,v 1.9 2013/04/16 06:57:06 jdc Exp $ */
/*
* Copyright (c) 2001 Valeriy E. Ushakov
@@ -51,4 +51,17 @@
extern int mspcic_assigned_interrupt(int);
+/*
+ * Bus space tags for memory and i/o.
+ */
+
+struct mspcic_pci_map {
+ uint32_t sysbase;
+ uint32_t pcibase;
+ uint32_t size;
+};
+
+#define IOMAP_SIZE 2
+#define MEMMAP_SIZE 3
+
#endif /* _SPARC_MSIIEP_VAR_H_ */
diff -r 9d3c749bce42 -r ec6f3482f3af sys/arch/sparc/sparc/pci_fixup.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/sparc/sparc/pci_fixup.c Tue Apr 16 06:57:05 2013 +0000
@@ -0,0 +1,527 @@
+/* $NetBSD: pci_fixup.c,v 1.1 2013/04/16 06:57:06 jdc Exp $ */
+
+/*-
+ * Copyright (c) 1999 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Julian Coleman.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/device.h>
+
+#include <net/if.h>
+#include <net/if_ether.h>
+
+#define _SPARC_BUS_DMA_PRIVATE
+#include <sys/bus.h>
+#include <machine/autoconf.h>
+#include <machine/promlib.h>
+
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/pcidevs.h>
+
+#include <dev/ofw/ofw_pci.h>
+
+#include <sparc/sparc/msiiepreg.h>
+#include <sparc/sparc/msiiepvar.h>
+#include <sparc/sparc/pci_fixup.h>
+
+static void mspcic_pci_fixup(int, pcitag_t, int *, uint32_t *, uint32_t *,
+ uint32_t, uint32_t memtop);
+
+extern struct mspcic_pci_map mspcic_pci_iomap[];
+extern struct mspcic_pci_map mspcic_pci_memmap[];
+
+/* ======================================================================
+ *
+ * General PCI bus fixup
+ */
+
+#define MAX_DEVFUN 256 /* 32 device * 8 function */
+#define DF_NEXTDEV(i) (i + 7 - (i % 8))
+#define MAP_TOP(map) (map.pcibase + map.size)
+#define RND_IO_START(t, m) (((t & m) == t) ? t : \
+ ((t + PCI_MAPREG_IO_SIZE(m)) & m))
+#define RND_MEM_START(t, m) (((t & m) == t) ? t : \
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