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[src/trunk]: src/sys/arch/arm/zynq Correct a register name
details: https://anonhg.NetBSD.org/src/rev/0526a7c29440
branches: trunk
changeset: 810569:0526a7c29440
user: skrll <skrll%NetBSD.org@localhost>
date: Fri Sep 04 07:38:05 2015 +0000
description:
Correct a register name
diffstat:
sys/arch/arm/zynq/zynq_usb.c | 8 ++++----
sys/arch/arm/zynq/zynq_usbreg.h | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
diffs (46 lines):
diff -r 4fb36a5f85a0 -r 0526a7c29440 sys/arch/arm/zynq/zynq_usb.c
--- a/sys/arch/arm/zynq/zynq_usb.c Fri Sep 04 07:35:56 2015 +0000
+++ b/sys/arch/arm/zynq/zynq_usb.c Fri Sep 04 07:38:05 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq_usb.c,v 1.1 2015/01/23 12:34:09 hkenken Exp $ */
+/* $NetBSD: zynq_usb.c,v 1.2 2015/09/04 07:38:05 skrll Exp $ */
/*-
* Copyright (c) 2015 Genetec Corporation. All rights reserved.
* Written by Hashimoto Kenichi for Genetec Corporation.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: zynq_usb.c,v 1.1 2015/01/23 12:34:09 hkenken Exp $");
+__KERNEL_RCSID(0, "$NetBSD: zynq_usb.c,v 1.2 2015/09/04 07:38:05 skrll Exp $");
#include "opt_zynq.h"
@@ -372,7 +372,7 @@
reg |= OTGSC_DPIE | OTGSC_IDIE;
bus_space_write_4(sc->sc_iot, sc->sc_ioh, ZYNQUSB_OTGSC, reg);
- reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, ZYNQUSB_OTGMODE);
+ reg = bus_space_read_4(sc->sc_iot, sc->sc_ioh, ZYNQUSB_USBMODE);
reg |= USBMODE_CM_HOST;
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, ZYNQUSB_OTGMODE, reg);
+ bus_space_write_4(sc->sc_iot, sc->sc_ioh, ZYNQUSB_USBMODE, reg);
}
diff -r 4fb36a5f85a0 -r 0526a7c29440 sys/arch/arm/zynq/zynq_usbreg.h
--- a/sys/arch/arm/zynq/zynq_usbreg.h Fri Sep 04 07:35:56 2015 +0000
+++ b/sys/arch/arm/zynq/zynq_usbreg.h Fri Sep 04 07:38:05 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: zynq_usbreg.h,v 1.1 2015/01/23 12:34:09 hkenken Exp $ */
+/* $NetBSD: zynq_usbreg.h,v 1.2 2015/09/04 07:38:05 skrll Exp $ */
/*-
* Copyright (c) 2015 Genetec Corporation. All rights reserved.
* Written by Hashimoto Kenichi for Genetec Corporation.
@@ -87,7 +87,7 @@
#define OTGSC_HAAR __BIT( 2)
#define OTGSC_VC __BIT( 1)
#define OTGSC_VD __BIT( 0)
-#define ZYNQUSB_OTGMODE 0x01A8
+#define ZYNQUSB_USBMODE 0x01A8
#define USBMODE_CM __BITS(1,0)
#define USBMODE_CM_IDLE __SHIFTIN(0, USBMODE_CM)
#define USBMODE_CM_DEVICE __SHIFTIN(2, USBMODE_CM)
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