[src/trunk]: src/sys/arch/arm/include Fix VBAR inlines

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/68c4fe70fbed
branches:  trunk
changeset: 787359:68c4fe70fbed
user:      matt <matt%NetBSD.org@localhost>
date:      Wed Jun 12 17:06:52 2013 +0000

description:
Fix VBAR inlines

diffstat:

 sys/arch/arm/include/armreg.h |  6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

diffs (20 lines):

diff -r dbb0c657b274 -r 68c4fe70fbed sys/arch/arm/include/armreg.h
--- a/sys/arch/arm/include/armreg.h     Wed Jun 12 15:11:08 2013 +0000
+++ b/sys/arch/arm/include/armreg.h     Wed Jun 12 17:06:52 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armreg.h,v 1.78 2013/06/12 05:25:58 matt Exp $ */
+/*     $NetBSD: armreg.h,v 1.79 2013/06/12 17:06:52 matt Exp $ */
 
 /*
  * Copyright (c) 1998, 2001 Ben Harris
@@ -732,8 +732,8 @@
 ARMREG_READ_INLINE(tpidrprw, "p15,0,%0,c13,c0,4") /* PL1 only Thread ID Register */
 ARMREG_WRITE_INLINE(tpidrprw, "p15,0,%0,c13,c0,4") /* PL1 only Thread ID Register */
 /* cp14 c12 registers */
-ARMREG_READ_INLINE(vbar, "p15,4,%0,c12,c0,0")  /* Vector Base Address Register */
-ARMREG_WRITE_INLINE(vbar, "p15,4,%0,c12,c0,0") /* Vector Base Address Register */
+ARMREG_READ_INLINE(vbar, "p15,0,%0,c12,c0,0")  /* Vector Base Address Register */
+ARMREG_WRITE_INLINE(vbar, "p15,0,%0,c12,c0,0") /* Vector Base Address Register */
 /* cp15 c14 registers */
 /* cp15 Global Timer Registers */
 ARMREG_READ_INLINE(cntfrq, "p15,0,%0,c14,c0,0") /* Counter Frequency Register */