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[src/trunk]: src/sys/arch/arm/nvidia add support for enabling the GPU
details: https://anonhg.NetBSD.org/src/rev/b408506bd273
branches: trunk
changeset: 811227:b408506bd273
user: jmcneill <jmcneill%NetBSD.org@localhost>
date: Sat Oct 17 21:16:09 2015 +0000
description:
add support for enabling the GPU
diffstat:
sys/arch/arm/nvidia/tegra_car.c | 33 +++++++++++++++++++++++++++++++--
sys/arch/arm/nvidia/tegra_carreg.h | 7 ++++++-
sys/arch/arm/nvidia/tegra_var.h | 3 ++-
3 files changed, 39 insertions(+), 4 deletions(-)
diffs (89 lines):
diff -r 311a8612eeec -r b408506bd273 sys/arch/arm/nvidia/tegra_car.c
--- a/sys/arch/arm/nvidia/tegra_car.c Sat Oct 17 21:14:49 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_car.c Sat Oct 17 21:16:09 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_car.c,v 1.26 2015/08/01 21:20:11 jmcneill Exp $ */
+/* $NetBSD: tegra_car.c,v 1.27 2015/10/17 21:16:09 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -29,7 +29,7 @@
#include "locators.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_car.c,v 1.26 2015/08/01 21:20:11 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_car.c,v 1.27 2015/10/17 21:16:09 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -831,3 +831,32 @@
CAR_RST_SOURCE_WDT_SEL |
CAR_RST_SOURCE_WDT_EN);
}
+
+void
+tegra_car_gpu_enable(void)
+{
+ bus_space_tag_t bst;
+ bus_space_handle_t bsh;
+
+ tegra_car_get_bs(&bst, &bsh);
+
+ /* Enter reset, enable clock */
+ bus_space_write_4(bst, bsh, CAR_RST_DEV_X_SET_REG, CAR_DEV_X_GPU);
+ bus_space_write_4(bst, bsh, CAR_CLK_ENB_X_SET_REG, CAR_DEV_X_GPU);
+
+ /* Set PLLP_OUT5 to 204MHz */
+ const u_int rate = 204000000;
+ const u_int div = howmany(tegra_car_pllp0_rate() * 2, rate) - 2;
+ tegra_reg_set_clear(bst, bsh, CAR_PLLP_OUTC_REG,
+ __SHIFTIN(div, CAR_PLLP_OUTC_OUT5_RATIO) |
+ CAR_PLLP_OUTC_OUT5_CLKEN,
+ CAR_PLLP_OUTC_OUT5_RATIO);
+ delay(20);
+
+ /* Remove clamping from 3D partition in the PMC */
+ tegra_pmc_remove_clamping(PMC_PARTID_TD);
+ delay(20);
+
+ /* Leave reset */
+ bus_space_write_4(bst, bsh, CAR_RST_DEV_X_CLR_REG, CAR_DEV_X_GPU);
+}
diff -r 311a8612eeec -r b408506bd273 sys/arch/arm/nvidia/tegra_carreg.h
--- a/sys/arch/arm/nvidia/tegra_carreg.h Sat Oct 17 21:14:49 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_carreg.h Sat Oct 17 21:16:09 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_carreg.h,v 1.20 2015/07/25 15:50:42 jmcneill Exp $ */
+/* $NetBSD: tegra_carreg.h,v 1.21 2015/10/17 21:16:09 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -63,6 +63,11 @@
#define CAR_PLLP_OUTB_OUT3_OVRRIDE __BIT(2)
#define CAR_PLLP_OUTB_OUT3_CLKEN __BIT(1)
#define CAR_PLLP_OUTB_OUT3_RSTN __BIT(0)
+#define CAR_PLLP_OUTC_REG 0x67c
+#define CAR_PLLP_OUTC_OUT5_RATIO __BITS(31,24)
+#define CAR_PLLP_OUTC_OUT5_OVERRIDE __BIT(18)
+#define CAR_PLLP_OUTC_OUT5_CLKEN __BIT(17)
+#define CAR_PLLP_OUTC_OUT5_RSTN __BIT(16)
#define CAR_PLLP_MISC_REG 0xac
#define CAR_PLLC_BASE_REG 0x80
diff -r 311a8612eeec -r b408506bd273 sys/arch/arm/nvidia/tegra_var.h
--- a/sys/arch/arm/nvidia/tegra_var.h Sat Oct 17 21:14:49 2015 +0000
+++ b/sys/arch/arm/nvidia/tegra_var.h Sat Oct 17 21:16:09 2015 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_var.h,v 1.24 2015/08/01 21:20:11 jmcneill Exp $ */
+/* $NetBSD: tegra_var.h,v 1.25 2015/10/17 21:16:09 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <jmcneill%invisible.ca@localhost>
@@ -108,6 +108,7 @@
int tegra_car_dc_enable(u_int);
void tegra_car_host1x_enable(void);
void tegra_car_wdt_enable(u_int, bool);
+void tegra_car_gpu_enable(void);
struct tegra_gpio_pin;
struct tegra_gpio_pin *tegra_gpio_acquire(const char *, u_int);
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